Olof Johansson [Thu, 17 Jun 2021 00:36:17 +0000 (17:36 -0700)]
Merge tag 'memory-controller-drv-tegra-5.14-2' of https://git./linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14 - Tegra SoC, part two
Second set of changes for Tegra SoC memory controller drivers,
containing patchset from Thierry Reding:
"The goal here is to avoid early identity mappings altogether and instead
postpone the need for the identity mappings to when devices are attached
to the SMMU. This works by making the SMMU driver coordinate with the
memory controller driver on when to start enforcing SMMU translations.
This makes Tegra behave in a more standard way and pushes the code to
deal with the Tegra-specific programming into the NVIDIA SMMU
implementation."
This pulls a dependency from Will Deacon (ARM SMMU driver) and contains
further ARM SMMU driver patches to resolve complex dependencies between
different patchsets. The pull from Will contains only one patch
("Implement ->probe_finalize()"). Further work in Will's tree might
depend on this patch, therefore patch was applied there.
On the other hand, this ("Implement ->probe_finalize()") patch is also a
dependency for ARM SMMU driver changes for Tegra. These changes,
bringing seamless transition from the firmware framebuffer to the OS
framebuffer, depend on earlier Tegra memory controller driver patches.
* tag 'memory-controller-drv-tegra-5.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: (37 commits)
iommu/arm-smmu: Use Tegra implementation on Tegra186
iommu/arm-smmu: tegra: Implement SID override programming
iommu/arm-smmu: tegra: Detect number of instances at runtime
dt-bindings: arm-smmu: Add Tegra186 compatible string
memory: tegra: Delete dead debugfs checking code
iommu/arm-smmu: Implement ->probe_finalize()
memory: tegra: Implement SID override programming
memory: tegra: Split Tegra194 data into separate file
memory: tegra: Add memory client IDs to tables
memory: tegra: Unify drivers
memory: tegra: Only initialize reset controller if available
memory: tegra: Make IRQ support opitonal
memory: tegra: Parameterize interrupt handler
memory: tegra: Extract setup code into callback
memory: tegra: Make per-SoC setup more generic
memory: tegra: Push suspend/resume into SoC drivers
memory: tegra: Introduce struct tegra_mc_ops
memory: tegra: Unify struct tegra_mc across SoC generations
memory: tegra: Consolidate register fields
memory: tegra30-emc: Use devm_tegra_core_dev_init_opp_table()
...
Link: https://lore.kernel.org/r/20210614195200.21657-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 15 Jun 2021 16:55:17 +0000 (09:55 -0700)]
Merge tag 'arm-ffa-5.14' of git://git./linux/kernel/git/sudeep.holla/linux into arm/drivers
Arm Firmware Framework for ARMv8-A(FFA) interface driver
The Arm FFA specification describes a software architecture to
leverages the virtualization extension to isolate software images
provided by an ecosystem of vendors from each other and describes
interfaces that standardize communication between the various software
images including communication between images in the Secure world and
Normal world. Any Hypervisor could use the FFA interfaces to enable
communication between VMs it manages.
The Hypervisor a.k.a Partition managers in FFA terminology can assign
system resources(Memory regions, Devices, CPU cycles) to the partitions
and manage isolation amongst them.
This is the initial and minimal support for the FFA interface to enable
communication between secure partitions and the normal world OS.
* tag 'arm-ffa-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_ffa: Add support for MEM_* interfaces
firmware: arm_ffa: Setup in-kernel users of FFA partitions
firmware: arm_ffa: Add support for SMCCC as transport to FFA driver
firmware: arm_ffa: Add initial Arm FFA driver support
firmware: arm_ffa: Add initial FFA bus support for device enumeration
arm64: smccc: Add support for SMCCCv1.2 extended input/output registers
Link: https://lore.kernel.org/r/20210601095838.GA838783@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 15 Jun 2021 15:36:01 +0000 (08:36 -0700)]
Merge tag 'tegra-for-5.14-firmware' of git://git./linux/kernel/git/tegra/linux into arm/drivers
firmware: tegra: Changes for v5.14-rc1
These changes contain two minor fixes for the Tegra BPMP driver.
* tag 'tegra-for-5.14-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
firmware: tegra: bpmp: Fix Tegra234-only builds
firmware: tegra: Fix error return code in tegra210_bpmp_init()
Link: https://lore.kernel.org/r/20210611164437.3568059-3-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 15 Jun 2021 15:17:10 +0000 (08:17 -0700)]
Merge tag 'qcom-drivers-for-5.14' of https://git./linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.14
In addition to fixing a kerneldoc issue in the qcom-ebi2 driver this
populates socinfo with a range of platforms and PMICs and extends a few
of the Qualcomm drivers bits of support for MSM8226, MDM9607, SM6125 and
SC8180X.
* tag 'qcom-drivers-for-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
firmware: qcom_scm: Add MDM9607 compatible
soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
soc: qcom: smd-rpm: Add MSM8226 compatible
dt-bindings: soc: qcom: smd-rpm: Add MSM8226 compatible
soc: qcom: socinfo: import PMIC IDs from pmic-spmi
bus: qcom-ebi2: Fix incorrect documentation for '{slow,fast}_cfg'
soc: qcom: socinfo: Add more IDs
soc: qcom: rpmhpd: Add SC8180X
dt-bindings: power: rpmpd: Add SC8180X to rpmpd binding
dt-bindings: soc: qcom: smd-rpm: Document SM6125 compatible
soc: qcom: smd-rpm: Add SM6125 compatible
soc: qcom: socinfo: Add remaining IPQ6018 family ID-s
soc: qcom: socinfo: Add missing SoC ID for SM6125
Link: https://lore.kernel.org/r/20210614223727.393159-1-bjorn.andersson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 15 Jun 2021 15:09:19 +0000 (08:09 -0700)]
Merge tag 'imx-drivers-5.14' of git://git./linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.14:
- A patch series from Lucas Stach and Peng Fan adding i.MX8MM power
domains support into i.MX GPCv2 driver.
- A couple of patches from Adam Ford adding i.MX8MN power domains on top
of i.MX8MM power domain support.
* tag 'imx-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpcv2: add support for i.MX8MN power domains
dt-bindings: add defines for i.MX8MN power domains
soc: imx: gpcv2: move reset assert after requesting domain power up
soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains
soc: imx: gpcv2: add support for i.MX8MM power domains
dt-bindings: power: add defines for i.MX8MM power domains
soc: imx: gpcv2: add support for optional resets
soc: imx: gpcv2: allow domains without power-sequence control
soc: imx: gpcv2: add runtime PM support for power-domains
soc: imx: gpcv2: wait for ADB400 handshake
soc: imx: gpcv2: split power up and power down sequence control
soc: imx: gpcv2: switch to clk_bulk_* API
soc: imx: gpcv2: move domain mapping to domain driver probe
soc: imx: gpcv2: move to more ideomatic error handling in probe
Link: https://lore.kernel.org/r/20210613082544.16067-1-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 15 Jun 2021 15:08:46 +0000 (08:08 -0700)]
Merge tag 'drivers_soc_for_5.13' of git://git./linux/kernel/git/ssantosh/linux-keystone into arm/drivers
SOC: Keystone driver update for v5.13
Couple of cleanup fixes in PM AVS and WKUP M3 drivers
* tag 'drivers_soc_for_5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: ti: wkup_m3_ipc: Remove redundant error printing in wkup_m3_ipc_probe()
PM: AVS: remove redundant dev_err call in omap_sr_probe()
Link: https://lore.kernel.org/r/1623564105-10273-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 12 Jun 2021 15:53:04 +0000 (08:53 -0700)]
Merge tag 'memory-controller-drv-pl353-5.14' of https://git./linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14 - PL353
Bigger work around ARM Primecell PL35x SMC memory controller driver by
Miquel Raynal built on previous series from Naga Sureshkumar Relli.
This includes bindings cleanup and correction, converting these to
dtschema and several cleanyps in pl353-smc driver.
* tag 'memory-controller-drv-pl353-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
dt-binding: memory: pl353-smc: Convert to yaml
MAINTAINERS: Add PL353 SMC entry
memory: pl353-smc: Declare variables following a reverse christmas tree order
memory: pl353-smc: Avoid useless acronyms in descriptions
memory: pl353-smc: Let lower level controller drivers handle inits
memory: pl353-smc: Rename goto labels
memory: pl353-smc: Fix style
dt-binding: memory: pl353-smc: Fix the NAND controller node in the example
dt-binding: memory: pl353-smc: Drop unsupported nodes from the example
dt-binding: memory: pl353-smc: Fix the example syntax and style
dt-binding: memory: pl353-smc: Describe the child reg property
dt-binding: memory: pl353-smc: Drop the partitioning section
dt-binding: memory: pl353-smc: Document the range property
dt-binding: memory: pl353-smc: Rephrase the binding
Link: https://lore.kernel.org/r/20210611140659.61980-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 12 Jun 2021 15:52:34 +0000 (08:52 -0700)]
Merge tag 'memory-controller-drv-5.14' of https://git./linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14
Several small fixes and cleanups for stm32, atmel, pl353, renesas-rpc,
TI emif and fsl_ifc.
* tag 'memory-controller-drv-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
memory: emif: remove unused frequency and voltage notifiers
memory: fsl_ifc: fix leak of private memory on probe failure
memory: fsl_ifc: fix leak of IO mapping on probe failure
MAINTAINERS: memory: cover also header file
memory: renesas-rpc-if: correct whitespace
memory: pl353: Fix error return code in pl353_smc_probe()
memory: atmel-ebi: add missing of_node_put for loop iteration
memory: stm32-fmc2-ebi: add missing of_node_put for loop iteration
Link: https://lore.kernel.org/r/20210611140659.61980-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 12 Jun 2021 15:47:18 +0000 (08:47 -0700)]
Merge tag 'v5.13-next-soc' of https://git./linux/kernel/git/matthias.bgg/linux into arm/drivers
devapc:
- add missing MODULE_DEVICE_TABLE to fix modalias
mkt-pm-domains:
- register smi node as regmap and not as syscon
- prepare-enable and unprepare-disable dependent clocks
pwrap:
- add support for MT8195
* tag 'v5.13-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: pwrap: add pwrap driver for MT8195 SoC
dt-bindings: mediatek: add compatible for MT8195 pwrap
soc: mtk-pm-domains: Fix the clock prepared issue
soc: mtk-pm-domains: do not register smi node as syscon
soc: mediatek: add missing MODULE_DEVICE_TABLE
Link: https://lore.kernel.org/r/479ec9ad-95d3-ce91-8243-63596c4c6676@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 12 Jun 2021 15:45:57 +0000 (08:45 -0700)]
Merge tag 'renesas-drivers-for-v5.14-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.14
- Initial support for the new RZ/G2L SoC variants.
* tag 'renesas-drivers-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
Link: https://lore.kernel.org/r/cover.1623403800.git.geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 12 Jun 2021 15:42:27 +0000 (08:42 -0700)]
Merge tag 'scmi-updates-5.14' of git://git./linux/kernel/git/sudeep.holla/linux into arm/drivers
ARM SCMI updates for v5.14
- Support for SCMI clocks from the SCMI power domains
- Addition of checks for correct compatibles for shmem devicetree nodes
that were found missing in the process of YAML schema conversion
- Kconfig and associated build fix found when optee transport are being
worked on
- Couple of fixes and cleanups found as with work-in-progress virtio
transport support
The new transports(optee and virtio) themselves are still being worked on
with ongoing reviews, they are not part of this yet
* tag 'scmi-updates-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scmi: Avoid multiple initialisations of hdr->protocol_id
firmware: arm_scmi: Move reinit_completion from scmi_xfer_get to do_xfer
firmware: arm_scmi: Add delayed response status check
firmware: arm_scmi: Add compatibility checks for shmem node
firmware: arm_scpi: Add compatibility checks for shmem node
firmware: arm_scmi: Fix the build when CONFIG_MAILBOX is not selected
firmware: arm_scmi: Reset Rx buffer to max size during async commands
firmware: arm_scmi: Add SMCCC discovery dependency in Kconfig
firmware: arm_scmi: Add clock management to the SCMI power domain
Link: https://lore.kernel.org/r/20210611075722.2813550-1-sudeep.holla@arm.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 12 Jun 2021 15:40:44 +0000 (08:40 -0700)]
Merge tag 'arm-soc/for-5.14/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom SoCs drivers changes for 5.14,
please pull the following:
- Jiapeng removes an unused variable in the Broadcom STB BIU driver
causing an unused warning.
* tag 'arm-soc/for-5.14/drivers' of https://github.com/Broadcom/stblinux:
soc: bcm: brcmstb: remove unused variable 'brcmstb_machine_match'
Link: https://lore.kernel.org/r/20210610194836.309869-3-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 12 Jun 2021 15:33:45 +0000 (08:33 -0700)]
Merge tag 'amlogic-drivers-for-v5.14' of https://git./linux/kernel/git/amlogic/linux into arm/drivers
Amlogic Drivers updates for v5.14:
- soc: amlogic: meson-ee-pwrc: Rename "get_power" to "is_powered_off"
* tag 'amlogic-drivers-for-v5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
soc: amlogic: meson-ee-pwrc: Rename "get_power" to "is_powered_off"
Link: https://lore.kernel.org/r/58283600-2d9a-c259-4d80-6915e6e6c79e@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 12 Jun 2021 15:23:38 +0000 (08:23 -0700)]
Merge tag 'reset-for-v5.14' of git://git.pengutronix.de/pza/linux into arm/drivers
Reset controller updates for v5.14
This tag adds support for the Microchip Sparx5 Switch Reset controller
and contains some small fixes and cleanups in core and various drivers.
* tag 'reset-for-v5.14' of git://git.pengutronix.de/pza/linux:
reset: brcmstb: Add missing MODULE_DEVICE_TABLE
reset: a10sr: add missing of_match_table reference
reset: RESET_INTEL_GW should depend on X86
reset: RESET_BRCMSTB_RESCAL should depend on ARCH_BRCMSTB
reset: uniphier: enclose UNIPHIER_RESET_ID_END value in parentheses
reset: sti/syscfg: replace comma with semicolon
reset: ti-syscon: fix to_ti_syscon_reset_data macro
reset: berlin: replace unsigned with unsigned int
reset: whitespace fixes
reset: mchp: sparx5: add switch reset driver
dt-bindings: reset: microchip sparx5 reset driver bindings
reset: oxnas: replace file name with short description
reset: zynqmp: replace spaces with tabs
reset: bcm6345: Make reset_control_ops const
Link: https://lore.kernel.org/r/418cf3a460cfe1d0f91f87e10baaf478bd41f1d5.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>
Adam Ford [Tue, 25 May 2021 01:07:29 +0000 (20:07 -0500)]
soc: imx: gpcv2: add support for i.MX8MN power domains
This adds support for the power domains founds on i.MX8MN. The Nano
has fewer domains than the Mini, and the access to some of these domains
is different than that of the Mini, the Mini power domains cannot be
reused.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adam Ford [Tue, 25 May 2021 01:07:28 +0000 (20:07 -0500)]
dt-bindings: add defines for i.MX8MN power domains
The i.MX8M Nano has a similar power domain controller to that of the
mini, but it isn't fully compatible, so it needs a separate binding
and power domain tables.
Add the bindings and tables.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Thierry Reding [Tue, 13 Apr 2021 12:23:35 +0000 (14:23 +0200)]
firmware: tegra: bpmp: Fix Tegra234-only builds
The tegra186_bpmp_ops symbol is used on Tegra234, so make sure it's
available.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 3 Jun 2021 16:46:29 +0000 (18:46 +0200)]
iommu/arm-smmu: Use Tegra implementation on Tegra186
Tegra186 requires the same SID override programming as Tegra194 in order
to seamlessly transition from the firmware framebuffer to the Linux
framebuffer, so the Tegra implementation needs to be used on Tegra186
devices as well.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-7-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Thu, 3 Jun 2021 16:46:28 +0000 (18:46 +0200)]
iommu/arm-smmu: tegra: Implement SID override programming
The secure firmware keeps some SID override registers set as passthrough
in order to allow devices such as the display controller to operate with
no knowledge of SMMU translations until an operating system driver takes
over. This is needed in order to seamlessly transition from the firmware
framebuffer to the OS framebuffer.
Upon successfully attaching a device to the SMMU and in the process
creating identity mappings for memory regions that are being accessed,
the Tegra implementation will call into the memory controller driver to
program the override SIDs appropriately.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-6-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Thu, 3 Jun 2021 16:46:27 +0000 (18:46 +0200)]
iommu/arm-smmu: tegra: Detect number of instances at runtime
Parse the reg property in device tree and detect the number of instances
represented by a device tree node. This is subsequently needed in order
to support single-instance SMMUs with the Tegra implementation because
additional programming is needed to properly configure the SID override
registers in the memory controller.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-5-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Thu, 3 Jun 2021 16:46:25 +0000 (18:46 +0200)]
dt-bindings: arm-smmu: Add Tegra186 compatible string
The ARM SMMU instantiations found on Tegra186 and later need inter-
operation with the memory controller in order to correctly program
stream ID overrides.
Furthermore, on Tegra194 multiple instances of the SMMU can gang up
to achieve higher throughput. In order to do this, they have to be
programmed identically so that the memory controller can interleave
memory accesses between them.
Add the Tegra186 compatible string to make sure the interoperation
with the memory controller can be enabled on that SoC generation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-3-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Fri, 11 Jun 2021 06:35:11 +0000 (08:35 +0200)]
Merge branch 'for-thierry/arm-smmu' of https://git./linux/kernel/git/will/linux into for-v5.14/tegra-mc
Pull ARM SMMU driver change from Will Deacon to resolve dependencies
between memory controllers, Tegra ARM SoC and ARM SMMU drivers trees.
Further ARM SMMU changes for Tegra depend on the change in Will's tree
and on Tegra memory controllers drivers work done before by Thierry
Reding. Pulling Will's tree allows to apply the rest of this ARM SMMU
Tegra work via memory controllers drivers tree.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:30 +0000 (10:20 +0200)]
dt-binding: memory: pl353-smc: Convert to yaml
Convert this binding file to yaml schema.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-10-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Konrad Dybcio [Sun, 31 Jan 2021 01:30:57 +0000 (02:30 +0100)]
firmware: qcom_scm: Add MDM9607 compatible
Add a compatible for MDM9607. It uses the "legacy" calling
convention.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013058.54299-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Konrad Dybcio [Sun, 31 Jan 2021 01:32:32 +0000 (02:32 +0100)]
soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
This SoC while being from 8916 era, makes use of the
newer-style, floor-level management, instead of the older
floor-corner.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013233.54666-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Miquel Raynal [Thu, 10 Jun 2021 08:20:37 +0000 (10:20 +0200)]
MAINTAINERS: Add PL353 SMC entry
Add Naga from Xilinx and myself responsible of this driver.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-16-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:36 +0000 (10:20 +0200)]
memory: pl353-smc: Declare variables following a reverse christmas tree order
This is a purely cosmetic change.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-15-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:35 +0000 (10:20 +0200)]
memory: pl353-smc: Avoid useless acronyms in descriptions
APER does not mean anything, while it seems legitimate to call this
clock the AXI peripheral clock.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-14-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:34 +0000 (10:20 +0200)]
memory: pl353-smc: Let lower level controller drivers handle inits
There is no point in having all these definitions at the SMC bus level,
these are extremely tight to the NAND controller driver implementation,
are not particularly generic, imply more boilerplate than needed, do
not really follow the device model by receiving no argument and some of
them are actually buggy.
Let's get rid of these right now as there is no current user and keep
this driver at a simple level: only the SMC bare initializations.
The NAND controller driver which I am going to introduce will take care
of redefining properly all these helpers and using them directly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-13-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:33 +0000 (10:20 +0200)]
memory: pl353-smc: Rename goto labels
A goto label is better named
do_something:
than
out_something_to_do:
Use the former wording and really describe what the jump involves.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-12-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:32 +0000 (10:20 +0200)]
memory: pl353-smc: Fix style
Use proper spacing.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-11-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:29 +0000 (10:20 +0200)]
dt-binding: memory: pl353-smc: Fix the NAND controller node in the example
To be fully valid, the NAND controller node in the example should be
named nand-controller instead of flash, should be at the address @0,0
instead of @
e1000000 and should have a couple of:
- #address-cells
- #size-cells
properties.
The label is being renamed nfc0 as well which is more usual than nand_0.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-8-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:28 +0000 (10:20 +0200)]
dt-binding: memory: pl353-smc: Drop unsupported nodes from the example
These nodes are given as examples and are not described nor used
anywhere else. There is also no hardware of my knowledge compatible with
these yet. If we want to be backward compatible, then we should avoid
partially describing nodes and their content while there are no users.
Plus, the examples are wrong (the addresses should be updated) so
let's drop them before converting this file to yaml (only the NAND node,
which will be fixed in the example and described somewhere else is
kept).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-7-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:27 +0000 (10:20 +0200)]
dt-binding: memory: pl353-smc: Fix the example syntax and style
Enhance the spacing, the comment style, add { }, remove (...).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-6-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:26 +0000 (10:20 +0200)]
dt-binding: memory: pl353-smc: Describe the child reg property
Each chil node should have a reg property, no matter the type of
controller (NAND, NOR, SRAM). This should be part of the bindings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-5-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:25 +0000 (10:20 +0200)]
dt-binding: memory: pl353-smc: Drop the partitioning section
This sentence does not belong to this file as this file describes the
bus on which various controllers are wired to.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-4-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:24 +0000 (10:20 +0200)]
dt-binding: memory: pl353-smc: Document the range property
The ranges property is missing in the description while actually used in
the example. This property is actually needed, so mention it.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-3-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Miquel Raynal [Thu, 10 Jun 2021 08:20:23 +0000 (10:20 +0200)]
dt-binding: memory: pl353-smc: Rephrase the binding
Reword this document before converting it to yaml.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-2-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Lad Prabhakar [Wed, 9 Jun 2021 16:37:16 +0000 (17:37 +0100)]
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
Add support for reading the LSI DEVID register which is present in
SYSC block of RZ/G2{L,LC} SoC's.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 9 Jun 2021 15:32:23 +0000 (16:32 +0100)]
soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
Add ARCH_R9A07G044 as a configuration symbol for the new Renesas
RZ/G2L SoC variants.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609153230.6967-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Krzysztof Kozlowski [Thu, 27 May 2021 15:41:01 +0000 (11:41 -0400)]
memory: emif: remove unused frequency and voltage notifiers
The driver defined several functions related to handling of frequency
and voltage changes:
- freq_post_notify_handling
- freq_pre_notify_handling
- volt_notify_handling
All these are static, not used inside or outside of driver, and marked
as unused with comment: "TODO: voltage notify handling should be hooked
up to regulator framework as soon as the necessary support is available
in mainline kernel. This function is un-used right now.".
These have been added with commit
a93de288aad3 ("memory: emif: handle
frequency and voltage change events") in 2012 and are unused since then.
Additionally mentioned regulator and clock hooking did not happen since
then. If it did not happen for nine years, let's assume it will not
happen suddenly now.
Remove all unused functions which also allows removal of "t_ck" static
variable "t_ck" and "addressing" member of private structure.
No functionality is lost.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210527154101.80556-1-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Thu, 27 May 2021 15:43:22 +0000 (11:43 -0400)]
memory: fsl_ifc: fix leak of private memory on probe failure
On probe error the driver should free the memory allocated for private
structure. Fix this by using resource-managed allocation.
Fixes:
a20cbdeffce2 ("powerpc/fsl: Add support for Integrated Flash Controller")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210527154322.81253-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Thu, 27 May 2021 15:43:21 +0000 (11:43 -0400)]
memory: fsl_ifc: fix leak of IO mapping on probe failure
On probe error the driver should unmap the IO memory. Smatch reports:
drivers/memory/fsl_ifc.c:298 fsl_ifc_ctrl_probe() warn: 'fsl_ifc_ctrl_dev->gregs' not released on lines: 298.
Fixes:
a20cbdeffce2 ("powerpc/fsl: Add support for Integrated Flash Controller")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210527154322.81253-1-krzysztof.kozlowski@canonical.com
Dan Carpenter [Wed, 9 Jun 2021 09:55:25 +0000 (12:55 +0300)]
memory: tegra: Delete dead debugfs checking code
The debugfs_create_dir() function does not return NULL, it returns error
pointers. But in normal situations like this where the caller is not
dereferencing "emc->debugfs.root" then we are not supposed to check the
return. So instead of fixing these checks, we should delete them.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/YMCQDTSyG8UuQoh0@mwanda
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Sudeep Holla [Tue, 8 Jun 2021 14:01:40 +0000 (15:01 +0100)]
firmware: arm_scmi: Avoid multiple initialisations of hdr->protocol_id
Since the hdr->protocol_id is set from the scmi_protocol_instance handle
just before the transfer, there is no need to initialise the same in
scmi_xfer_get_init. Remove the unnecessary initialisations.
Link: https://lore.kernel.org/r/20210608140140.2042257-1-sudeep.holla@arm.com
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Cristian Marussi [Sun, 6 Jun 2021 22:12:24 +0000 (23:12 +0100)]
firmware: arm_scmi: Move reinit_completion from scmi_xfer_get to do_xfer
Re-using timed out xfers in a loop can lead to issue if completion was
not properly reinitialized. Move reinit_completion from scmi_xfer_get to
do_xfer to avoid the issue.
Link: https://lore.kernel.org/r/20210606221232.33768-3-cristian.marussi@arm.com
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
[sudeep.holla: moved reinit_completion instead of adding another one]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Cristian Marussi [Tue, 8 Jun 2021 10:30:56 +0000 (11:30 +0100)]
firmware: arm_scmi: Add delayed response status check
A successfully received delayed response could anyway report a failure at
the protocol layer in the message status field.
Add a check also for this error condition.
Link: https://lore.kernel.org/r/20210608103056.3388-1-cristian.marussi@arm.com
Fixes:
58ecdf03dbb9 ("firmware: arm_scmi: Add support for asynchronous commands and delayed response")
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Sudeep Holla [Wed, 2 Jun 2021 07:38:51 +0000 (08:38 +0100)]
firmware: arm_scmi: Add compatibility checks for shmem node
The shared memory node used for communication between the firmware and
the OS should be compatible with "arm,scmi-shmem". Add the check for the
same while parsing the node before fetching the memory regions.
Link: https://lore.kernel.org/r/20210602073851.1005607-2-sudeep.holla@arm.com
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Cristian Marussi <cristian.marussi@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jim Quinlan <jim2101024@gmail.com>
Cc: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Thierry Reding [Thu, 3 Jun 2021 16:46:26 +0000 (18:46 +0200)]
iommu/arm-smmu: Implement ->probe_finalize()
Implement a ->probe_finalize() callback that can be used by vendor
implementations to perform extra programming necessary after devices
have been attached to the SMMU.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-4-thierry.reding@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
Zhen Lei [Fri, 4 Jun 2021 20:04:13 +0000 (13:04 -0700)]
soc: ti: wkup_m3_ipc: Remove redundant error printing in wkup_m3_ipc_probe()
When devm_ioremap_resource() fails, a clear enough error message will be
printed by its subfunction __devm_ioremap_resource(). The error
information contains the device name, failure cause, and possibly resource
information.
Therefore, remove the error printing here to simplify code and reduce the
binary size.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Qiheng Lin [Fri, 4 Jun 2021 20:04:06 +0000 (13:04 -0700)]
PM: AVS: remove redundant dev_err call in omap_sr_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Reported-by: Hulk Robot <hulkci@huawei.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Qiheng Lin <linqiheng@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Thierry Reding [Thu, 3 Jun 2021 16:46:24 +0000 (18:46 +0200)]
memory: tegra: Implement SID override programming
Instead of programming all SID overrides during early boot, perform the
operation on-demand after the SMMU translations have been set up for a
device. This reuses data from device tree to match memory clients for a
device and programs the SID specified in device tree, which corresponds
to the SID used for the SMMU context banks for the device.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-2-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:33:02 +0000 (18:33 +0200)]
memory: tegra: Split Tegra194 data into separate file
Keep the directory structure consistent by splitting the Tegra194 data
into a separate file.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-13-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:33:01 +0000 (18:33 +0200)]
memory: tegra: Add memory client IDs to tables
The memory client IDs will subsequently be used to program override SIDs
for the given clients depending on the device tree configuration.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-12-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:33:00 +0000 (18:33 +0200)]
memory: tegra: Unify drivers
The Tegra210 (and earlier) driver now supports all the functionality
that the Tegra186 (and later) driver does, so they can be unified.
Note that previously the Tegra186 (and later) driver could be unloaded,
even if that was perhaps not very useful. Older chips don't support that
yet, but once they do this code can be reenabled.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-11-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:32:59 +0000 (18:32 +0200)]
memory: tegra: Only initialize reset controller if available
The memory controller hot resets are implemented in the BPMP on Tegra186
and later, so there's no need to provide an implementation via the
memory controller driver. Conditionally register the reset controller
only if needed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-10-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:32:58 +0000 (18:32 +0200)]
memory: tegra: Make IRQ support opitonal
Make IRQ support optional to help unify the Tegra186 memory controller
driver with this one.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-9-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:32:57 +0000 (18:32 +0200)]
memory: tegra: Parameterize interrupt handler
Tegra20 requires a slightly different interrupt handler than Tegra30 and
later, so parameterize the handler, so that each SoC implementation can
provide its own.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-8-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:32:56 +0000 (18:32 +0200)]
memory: tegra: Extract setup code into callback
Separate the setup code for Tegra30 and later into a ->setup() callback
and set it for all applicable chips.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-7-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:32:55 +0000 (18:32 +0200)]
memory: tegra: Make per-SoC setup more generic
The current per-SoC setup code runs at a fairly arbitrary point during
probe, thereby making it less flexible for other SoC generations. Move
the call around slightly (after only the very basic, common setup that
applies to all SoC generations has been performed), which will allow
it to be used for other implementations.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-6-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:32:54 +0000 (18:32 +0200)]
memory: tegra: Push suspend/resume into SoC drivers
Continuing the scheme of unification, push suspend/resume callbacks into
per-SoC driver so that they can be properly parameterized.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-5-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:32:53 +0000 (18:32 +0200)]
memory: tegra: Introduce struct tegra_mc_ops
Subsequent patches will introduce further callbacks, so create a new
struct tegra_mc_ops to collect all of them in a single place. Move the
existing ->init() callback into the new structure.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-4-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:32:52 +0000 (18:32 +0200)]
memory: tegra: Unify struct tegra_mc across SoC generations
As another step towards unifying both the Tegra210 (and earlier) and
Tegra186 (and later) memory controller drivers, unify the structures
that are used to represent them.
Note that this comes at a slight space penalty since some fields are
not used on all generations, but the benefits of unifying the driver
outweigh the downsides.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-3-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Thierry Reding [Wed, 2 Jun 2021 16:32:51 +0000 (18:32 +0200)]
memory: tegra: Consolidate register fields
Subsequent patches will add more register fields to the tegra_mc_client
structure, so consolidate all register field definitions into a common
sub-structure for coherency.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-2-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Thu, 3 Jun 2021 19:43:54 +0000 (21:43 +0200)]
Merge tag 'tegra-for-5.14-memory' of https://git./linux/kernel/git/tegra/linux into for-v5.14/tegra-mc
memory: tegra: Changes for v5.14-rc1
This stable tag contains Dmitry's power domain work, including all the
necessary dependencies from the regulator, clock and ARM SoC trees.
Further work depends on memory controller changes here.
Henry Chen [Wed, 2 Jun 2021 11:20:50 +0000 (19:20 +0800)]
soc: mediatek: pwrap: add pwrap driver for MT8195 SoC
MT8195 are highly integrated SoC and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20210602112050.12338-3-james.lo@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Henry Chen [Wed, 2 Jun 2021 11:20:49 +0000 (19:20 +0800)]
dt-bindings: mediatek: add compatible for MT8195 pwrap
This adds dt-binding documentation of pwrap for Mediatek MT8195
SoCs Platform.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20210602112050.12338-2-james.lo@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Sudeep Holla [Wed, 2 Jun 2021 07:38:50 +0000 (08:38 +0100)]
firmware: arm_scpi: Add compatibility checks for shmem node
The shared memory node used for communication between the firmware and
the OS should be compatible with one of the following:
- amlogic,meson-gxbb-scp-shmem
- amlogic,meson-axg-scp-shmem
- arm,juno-scp-shmem
- arm,scp-shmem
Add the check for the same while parsing the node before fetching the memory
regions.
Link: https://lore.kernel.org/r/20210602073851.1005607-1-sudeep.holla@arm.com
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Sudeep Holla [Thu, 3 Jun 2021 07:26:31 +0000 (08:26 +0100)]
firmware: arm_scmi: Fix the build when CONFIG_MAILBOX is not selected
0day CI kernel test robot reported following build error with randconfig
aarch64-linux-ld: drivers/firmware/arm_scmi/driver.o:(.rodata+0x1e0):
undefined reference to `scmi_mailbox_desc'
Fix the error by adding CONFIG_MAILBOX dependency for scmi_mailbox_desc.
Link: https://lore.kernel.org/r/20210603072631.1660963-1-sudeep.holla@arm.com
Cc: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Cristian Marussi <cristian.marussi@arm.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Dmitry Osipenko [Tue, 1 Jun 2021 02:31:15 +0000 (05:31 +0300)]
memory: tegra30-emc: Use devm_tegra_core_dev_init_opp_table()
Use common devm_tegra_core_dev_init_opp_table() helper for the OPP table
initialization.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Tue, 1 Jun 2021 02:31:14 +0000 (05:31 +0300)]
memory: tegra20-emc: Use devm_tegra_core_dev_init_opp_table()
Use common devm_tegra_core_dev_init_opp_table() helper for the OPP table
initialization.
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Tue, 1 Jun 2021 02:31:13 +0000 (05:31 +0300)]
memory: tegra: Enable compile testing for all drivers
Enable compile testing for all Tegra memory drivers.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Krzysztof Kozlowski [Tue, 1 Jun 2021 16:06:08 +0000 (18:06 +0200)]
MAINTAINERS: memory: cover also header file
Add include/memory/ in memory drivers maintainers entry. So far there
is only one file there for Renesas Reduced Pin Count Interface driver.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210601160608.312446-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 1 Jun 2021 16:06:07 +0000 (18:06 +0200)]
memory: renesas-rpc-if: correct whitespace
Use spaces instead of tabs as word separator.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210601160608.312446-1-krzysztof.kozlowski@canonical.com
Cristian Marussi [Tue, 1 Jun 2021 10:24:17 +0000 (11:24 +0100)]
firmware: arm_scmi: Reset Rx buffer to max size during async commands
During an async commands execution the Rx buffer length is at first set
to max_msg_sz when the synchronous part of the command is first sent.
However once the synchronous part completes the transport layer waits
for the delayed response which will be processed using the same xfer
descriptor initially allocated. Since synchronous response received at
the end of the xfer will shrink the Rx buffer length to the effective
payload response length, it needs to be reset again.
Raise the Rx buffer length again to max_msg_sz before fetching the
delayed response to ensure full response is read correctly from the
shared memory.
Link: https://lore.kernel.org/r/20210601102421.26581-2-cristian.marussi@arm.com
Fixes:
58ecdf03dbb9 ("firmware: arm_scmi: Add support for asynchronous commands and delayed response")
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
[sudeep.holla: moved reset to scmi_handle_response as it could race with
do_xfer_with_response]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Weiyi Lu [Tue, 1 Jun 2021 03:59:03 +0000 (11:59 +0800)]
soc: mtk-pm-domains: Fix the clock prepared issue
In this new power domain driver, when adding one power domain
it will prepare the dependent clocks at the same.
So we only do clk_bulk_enable/disable control during power ON/OFF.
When system suspend, the pm runtime framework will forcely power off
power domains. However, the dependent clocks are disabled but kept
prepared.
In MediaTek clock drivers, PLL would be turned ON when we do
clk_bulk_prepare control.
Clock hierarchy:
PLL -->
DIV_CK -->
CLK_MUX
(may be dependent clocks)
-->
SUBSYS_CG
(may be dependent clocks)
It will lead some unexpected clock states during system suspend.
This patch will fix by doing prepare_enable/disable_unprepare on
dependent clocks at the same time while we are going to power on/off
any power domain.
Fixes:
59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: chun-jie.chen <chun-jie.chen@mediatek.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210601035905.2970384-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Hsin-Yi Wang [Tue, 1 Jun 2021 03:59:04 +0000 (11:59 +0800)]
soc: mtk-pm-domains: do not register smi node as syscon
Mediatek requires mmsys clocks to be unprepared during suspend,
otherwise system has chances to hang.
syscon_regmap_lookup_by_phandle_optional() will attach and prepare the
first clock in smi node, leading to additional prepare to the clock
which is not balanced with the prepare/unprepare pair in resume/suspend
callbacks.
If a power domain node requests an smi node and the smi node's first
clock is an mmsys clock, it will results in an unstable suspend resume.
Fixes:
f414854c8843 ("soc: mediatek: pm-domains: Add SMI block as bus protection block")
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: chun-jie.chen <chun-jie.chen@mediatek.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210601035905.2970384-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Etienne Carriere [Fri, 21 May 2021 13:40:51 +0000 (15:40 +0200)]
firmware: arm_scmi: Add SMCCC discovery dependency in Kconfig
ARM_SCMI_PROTOCOL depends on either MAILBOX or HAVE_ARM_SMCCC_DISCOVERY,
not MAILBOX alone. Fix the depedency in Kconfig file and driver to
reflect the same.
Link: https://lore.kernel.org/r/20210521134055.24271-1-etienne.carriere@linaro.org
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
[sudeep.holla: Minor tweaks to subject and change log]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Zhen Lei [Thu, 13 May 2021 13:26:46 +0000 (21:26 +0800)]
firmware: tegra: Fix error return code in tegra210_bpmp_init()
When call irq_get_irq_data() to get the IRQ's irq_data failed, an
appropriate error code -ENOENT should be returned. However, we directly
return 'err', which records the IRQ number instead of the error code.
Fixes:
139251fc2208 ("firmware: tegra: add bpmp driver for Tegra210")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Tue, 1 Jun 2021 02:31:12 +0000 (05:31 +0300)]
memory: tegra: Fix compilation warnings on 64bit platforms
Fix compilation warning on 64bit platforms caused by implicit promotion
of 32bit signed integer to a 64bit unsigned value which happens after
enabling compile-testing of the EMC drivers.
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 1 Jun 2021 11:42:41 +0000 (13:42 +0200)]
Merge branch 'for-5.14/soc' into for-5.14/memory
Thierry Reding [Tue, 1 Jun 2021 11:38:23 +0000 (13:38 +0200)]
Merge branch 'for-5.14/clk' into for-5.14/memory
Dmitry Osipenko [Tue, 1 Jun 2021 02:31:11 +0000 (05:31 +0300)]
clk: tegra: Add stubs needed for compile-testing
Add stubs needed for compile-testing of Tegra memory drivers.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Thu, 27 May 2021 23:54:04 +0000 (02:54 +0300)]
soc/tegra: fuse: Add stubs needed for compile-testing
Add missing stubs that will allow Tegra memory driver to be compile-tested
by kernel build bots.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Thu, 27 May 2021 23:54:03 +0000 (02:54 +0300)]
soc/tegra: Add devm_tegra_core_dev_init_opp_table()
Add common helper which initializes OPP table for Tegra SoC core devices.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Thu, 27 May 2021 23:54:02 +0000 (02:54 +0300)]
soc/tegra: Add stub for soc_is_tegra()
Add stub required for compile-testing of drivers.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Thu, 27 May 2021 23:54:01 +0000 (02:54 +0300)]
soc/tegra: regulators: Bump voltages on system reboot
Ensure that SoC voltages are at a level suitable for a system reboot.
This is important for some devices that use CPU reset method for the
rebooting. SoC CPU and core voltages now are be restored to a level
that is suitable for rebooting. This patch fixes hang on reboot on
Asus Transformer TF101, it was also reported as fixing some of reboot
issues on Toshiba AC100.
Reported-by: Nikola Milosavljević <mnidza@outlook.com>
Tested-by: Nikola Milosavljević <mnidza@outlook.com> # TF101
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 1 Jun 2021 10:13:52 +0000 (12:13 +0200)]
Merge branch 'for-5.14/regulator' into for-5.14/soc
Dmitry Osipenko [Thu, 27 May 2021 23:54:00 +0000 (02:54 +0300)]
regulator: core: Add regulator_sync_voltage_rdev()
Some NVIDIA Tegra devices use a CPU soft-reset method for the reboot and
in this case we need to restore the coupled voltages to the state that is
suitable for hardware during boot. Add new regulator_sync_voltage_rdev()
helper which is needed by regulator drivers in order to sync voltage of
a coupled regulators.
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Bartosz Dudziak [Sun, 2 May 2021 12:20:25 +0000 (14:20 +0200)]
soc: qcom: smd-rpm: Add MSM8226 compatible
Add a compatible for the RPM on the Qualcomm MSM8226 platform.
Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
Link: https://lore.kernel.org/r/20210502122027.9351-3-bartosz.dudziak@snejp.pl
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Bartosz Dudziak [Sun, 2 May 2021 12:20:24 +0000 (14:20 +0200)]
dt-bindings: soc: qcom: smd-rpm: Add MSM8226 compatible
Add the dt-binding for the rpm on the Qualcomm MSM8226 SoC platform.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
Link: https://lore.kernel.org/r/20210502122027.9351-2-bartosz.dudziak@snejp.pl
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Dmitry Osipenko [Sun, 16 May 2021 16:30:40 +0000 (19:30 +0300)]
clk: tegra: Don't deassert reset on enabling clocks
The Tegra clock driver contains legacy code which deasserts hardware reset
when peripheral clocks are enabled. This behaviour comes from a pre-CCF
era of the Tegra drivers. This is unacceptable for modern kernel drivers
which use generic CCF and reset-control APIs because it breaks assumptions
of the drivers about clk/reset sequences and about reset-propagation
delays. Hence remove the awkward legacy behaviour from the clk driver.
In particular PMC driver assumes that hardware blocks remains in reset
while power domain is turning on, but the clk driver deasserts the reset
before power clamp is removed, hence breaking the driver's assumption.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Sun, 16 May 2021 16:30:39 +0000 (19:30 +0300)]
clk: tegra: Mark external clocks as not having reset control
The external clocks don't have reset bits as they don't belong to any
specific hardware unit. Mark them as not having reset control for
consistency.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Sun, 16 May 2021 16:30:38 +0000 (19:30 +0300)]
clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling
Check whether thermal DIV2 throttle is active in order to report
the CPU frequency properly. This very useful for userspace tools
like cpufreq-info which show actual frequency asserted from hardware.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Sun, 16 May 2021 16:30:37 +0000 (19:30 +0300)]
clk: tegra: Don't allow zero clock rate for PLLs
Zero clock rate doesn't make sense for PLLs and tegra-clk driver enters
into infinite loop on trying to calculate PLL parameters for zero rate.
Make code to error out if requested rate is zero.
Originally this trouble was found by Robert Yang while he was trying to
bring up upstream kernel on Samsung Galaxy Tab, which happened due to a
bug in Tegra DRM driver that erroneously sets PLL rate to zero. This
issues came over again recently during of kernel bring up on ASUS TF700T.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Sun, 16 May 2021 16:30:36 +0000 (19:30 +0300)]
clk: tegra: Halve SCLK rate on Tegra20
Higher SCLK rates on Tegra20 require high core voltage. The higher
clock rate may have a positive performance effect only for AHB DMA
transfers and AVP CPU, but both aren't used by upstream kernel at all.
Halve SCLK rate on Tegra20 in order to remove the high core voltage
requirement.
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Sun, 16 May 2021 16:30:35 +0000 (19:30 +0300)]
clk: tegra: Ensure that PLLU configuration is applied properly
The PLLU (USB) consists of the PLL configuration itself and configuration
of the PLLU outputs. The PLLU programming is inconsistent on T30 vs T114,
where T114 immediately bails out if PLLU is enabled and T30 re-enables
a potentially already enabled PLL (left after bootloader) and then fully
reprograms it, which could be unsafe to do. The correct way should be to
skip enabling of the PLL if it's already enabled and then apply
configuration to the outputs. This patch doesn't fix any known problems,
it's a minor improvement.
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Sun, 16 May 2021 16:30:34 +0000 (19:30 +0300)]
clk: tegra: Fix refcounting of gate clocks
The refcounting of the gate clocks has a bug causing the enable_refcnt
to underflow when unused clocks are disabled. This happens because clk
provider erroneously bumps the refcount if clock is enabled at a boot
time, which it shouldn't be doing, and it does this only for the gate
clocks, while peripheral clocks are using the same gate ops and the
peripheral clocks are missing the initial bump. Hence the refcount of
the peripheral clocks is 0 when unused clocks are disabled and then the
counter is decremented further by the gate ops, causing the integer
underflow.
Fix this problem by removing the erroneous bump and by implementing the
disable_unused() callback, which disables the unused gates properly.
The visible effect of the bug is such that the unused clocks are never
gated if a loaded kernel module grabs the unused clocks and starts to use
them. In practice this shouldn't cause any real problems for the drivers
and boards supported by the kernel today.
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Sun, 16 May 2021 16:30:33 +0000 (19:30 +0300)]
clk: tegra30: Use 300MHz for video decoder by default
The 600MHz is a too high clock rate for some SoC versions for the video
decoder hardware and this may cause stability issues. Use 300MHz for the
video decoder by default, which is supported by all hardware versions.
Fixes:
ed1a2459e20c ("clk: tegra: Add Tegra20/30 EMC clock implementation")
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Martin Blumenstingl [Mon, 17 May 2021 20:21:15 +0000 (22:21 +0200)]
soc: amlogic: meson-ee-pwrc: Rename "get_power" to "is_powered_off"
The name "get_power" is used within the Meson EE power controller driver
to indicate whether a power domain is turned on or off. With the
original "get_power" naming the result was:
- true = powered off
- false = powered on
Rename "get_power" to "is_powered_off" to make the naming consistent
with the third argument to pm_genpd_init. Also this naming is easier to
understand when reading the code without looking at the implementation
of "get_power".
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210517202115.1004065-1-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>