Yang Li [Fri, 1 Sep 2023 01:29:20 +0000 (09:29 +0800)]
drm/amd/display: clean up one inconsistent indenting
drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_srv.c:355 dmub_srv_hw_setup() warn: inconsistent indenting
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yang Li [Fri, 1 Sep 2023 00:52:26 +0000 (08:52 +0800)]
drm/amd/display: Remove duplicated include in dcn35_clk_mgr.c
./drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c: dcn35_clk_mgr.h is included more than once.
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hamza Mahfooz [Tue, 5 Sep 2023 17:27:22 +0000 (13:27 -0400)]
drm/amd/display: prevent potential division by zero errors
There are two places in apply_below_the_range() where it's possible for
a divide by zero error to occur. So, to fix this make sure the divisor
is non-zero before attempting the computation in both cases.
Cc: stable@vger.kernel.org
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2637
Fixes:
a463b263032f ("drm/amd/display: Fix frames_to_insert math")
Fixes:
ded6119e825a ("drm/amd/display: Reinstate LFC optimization")
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yang Li [Fri, 1 Sep 2023 00:52:25 +0000 (08:52 +0800)]
drm/amd/display: Remove duplicated include in dcn35_hwseq.c
./drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hwseq.c: clk_mgr.h is included more than once.
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yang Li [Fri, 1 Sep 2023 00:52:24 +0000 (08:52 +0800)]
drm/amd/display: Remove duplicated include in dcn35_optc.c
./drivers/gpu/drm/amd/display/dc/dcn35/dcn35_optc.c: dcn35_optc.h is included more than once.
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yang Li [Fri, 1 Sep 2023 00:52:23 +0000 (08:52 +0800)]
drm/amd/display: Remove duplicated include in dcn35_resource.c
./drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c: dcn31/dcn31_dio_link_encoder.h is included more than once.
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jiapeng Chong [Fri, 1 Sep 2023 07:02:40 +0000 (15:02 +0800)]
drm/amdgpu: clean up some inconsistent indenting
No functional modification involved.
drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c:34 nbio_v7_11_get_rev_id() warn: inconsistent indenting.
v2: drop leftover printk (Alex)
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=6316
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Melissa Wen [Thu, 31 Aug 2023 16:12:28 +0000 (15:12 -0100)]
drm/amd/display: enable cursor degamma for DCN3+ DRM legacy gamma
For DRM legacy gamma, AMD display manager applies implicit sRGB degamma
using a pre-defined sRGB transfer function. It works fine for DCN2
family where degamma ROM and custom curves go to the same color block.
But, on DCN3+, degamma is split into two blocks: degamma ROM for
pre-defined TFs and `gamma correction` for user/custom curves and
degamma ROM settings doesn't apply to cursor plane. To get DRM legacy
gamma working as expected, enable cursor degamma ROM for implict sRGB
degamma on HW with this configuration.
Cc: stable@vger.kernel.org
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2803
Fixes:
96b020e2163f ("drm/amd/display: check attr flag before set cursor degamma on DCN3+")
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yifan Zhang [Fri, 25 Aug 2023 03:14:34 +0000 (11:14 +0800)]
drm/amdgpu: calling address translation functions to simplify codes
Use amdgpu_gmc_vram_pa to simplify codes.
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yifan Zhang [Thu, 31 Aug 2023 03:17:35 +0000 (11:17 +0800)]
drm/amd/pm: only poweron/off vcn/jpeg when they are valid.
If vcn is disabled in kernel parameters, don't touch vcn,
otherwise it may cause vcn hang.
v2: delete unnecessary logs
v3: move "is_vcn_enabled" check to smu_dpm_setvcn/jpeg_enable (Evan)
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hamza Mahfooz [Thu, 31 Aug 2023 19:22:35 +0000 (15:22 -0400)]
drm/amd/display: limit the v_startup workaround to ASICs older than DCN3.1
Since, calling dcn20_adjust_freesync_v_startup() on DCN3.1+ ASICs
can cause the display to flicker and underflow to occur, we shouldn't
call it for them. So, ensure that the DCN version is less than
DCN_VERSION_3_1 before calling dcn20_adjust_freesync_v_startup().
Cc: stable@vger.kernel.org
Reviewed-by: Fangzhi Zuo <jerry.zuo@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dembskiy Igor [Wed, 30 Aug 2023 14:01:03 +0000 (17:01 +0300)]
drm/amd/display: remove useless check in should_enable_fbc()
It does not make sense to compare a pointer to array element with NULL.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes:
65d38262b3e8 ("drm/amd/display: fbc state could not reach while enable fbc")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Dembskiy Igor <dii@itb.spb.ru>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hamza Mahfooz [Thu, 31 Aug 2023 19:17:14 +0000 (15:17 -0400)]
Revert "drm/amd/display: Remove v_startup workaround for dcn3+"
This reverts commit
3a31e8b89b7240d9a17ace8a1ed050bdcb560f9e.
We still need to call dcn20_adjust_freesync_v_startup() for older DCN3+
ASICs. Otherwise, it can cause DP to HDMI 2.1 PCONs to fail to light up.
Cc: stable@vger.kernel.org
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2809
Reviewed-by: Fangzhi Zuo <jerry.zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Mon, 14 Aug 2023 02:16:27 +0000 (10:16 +0800)]
Revert "drm/amd/pm: disable the SMU13 OD feature support temporarily"
This reverts commit
510d242f498a00f4701b77c6f42df880abacb3bd.
The enablement for the new OD mechanism completed. Also, the support for
fan control related OD feature has been added via this new mechanism.
Thus, it is time to bring back the SMU13 OD support.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 11 Aug 2023 11:52:12 +0000 (19:52 +0800)]
drm/amd/pm: add fan minimum pwm OD setting support for SMU13
Add SMU13 fan minimum pwm OD setting support.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 11 Aug 2023 11:33:23 +0000 (19:33 +0800)]
drm/amd/pm: add fan target temperature OD setting support for SMU13
Add SMU13 fan target temperature OD setting support.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 11 Aug 2023 10:09:14 +0000 (18:09 +0800)]
drm/amd/pm: add fan acoustic target OD setting support for SMU13
Add SMU13 fan acoustic target OD setting support.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Mon, 17 Jul 2023 06:30:25 +0000 (14:30 +0800)]
drm/amdgpu: update SET_HW_RESOURCES definition for UMSCH
Align with FW changes.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Sat, 3 Jun 2023 09:41:20 +0000 (17:41 +0800)]
drm/amdgpu: add amdgpu_umsch_mm module parameter
Enable Multi Media User Mode Scheduler
(0 = disabled (default), 1 = enabled).
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 21 Jun 2023 12:16:46 +0000 (20:16 +0800)]
drm/amdgpu/discovery: enable UMSCH 4.0 in IP discovery
Enable UMSCH to support VPE and VCN user queues.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Mon, 19 Jun 2023 00:58:32 +0000 (08:58 +0800)]
drm/amdgpu: add PSP loading support for UMSCH
Add front door loading support.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 14 Jun 2023 03:50:27 +0000 (11:50 +0800)]
drm/amdgpu: reserve mmhub engine 3 for UMSCH FW
UMSCH FW uses mmhub engine 3 for invalidation.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 21 Jun 2023 09:56:24 +0000 (17:56 +0800)]
drm/amdgpu: add VPE queue submission test
Submit a fence command through indirect buffer.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 21 Jun 2023 08:07:52 +0000 (16:07 +0800)]
drm/amdgpu: add selftest framework for UMSCH
Prepare for VPE and VCN queue submission test.
v2: rebase on drm_exec (Alex)
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 21 Jun 2023 07:49:48 +0000 (15:49 +0800)]
drm/amdgpu: enable UMSCH scheduling for VPE
Add VPE into UMSCH hw resourses,
set vmid mask to 0xf00,
set hqd mask to 0xfe,
then UMSCH can schedule VPE queues.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 10 May 2023 08:49:45 +0000 (16:49 +0800)]
drm/amdgpu: add initial support for UMSCH
Add basic data structure, dummy ring functions
and ip functions for UMSCH.
Implement sw_init(ring_init and init_microcodede) and
hw_init(load_microcode), UMSCH can boot up now.
Implement hw_init(ring_start) and hw_fini(ring_stop),
UMSCH is ready for command submission now.
Implement set_hw_resources and add/remove_queue,
UMSCH is ready for scheduling now.
Aggregated doorbell is used to notify UMSCH FW that
there is unmapped queue with corresponding priority level
(e.g., AGDB[0] for Real time band, etc.) is updating its job.
v2: squash together initial patches to avoid breaking the
build (Alex)
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 10 May 2023 08:14:44 +0000 (16:14 +0800)]
drm/amdgpu: add UMSCH 4.0 api definition
Add api definition for UMSCH 4.0.
v2: adjust coding style.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 10 May 2023 08:13:26 +0000 (16:13 +0800)]
drm/amdgpu: add UMSCH firmware header definition
Add firmware header definition for UMSCH.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 10 May 2023 08:04:17 +0000 (16:04 +0800)]
drm/amdgpu: add UMSCH RING TYPE definition
Add RING TYPE definition for Multi Mdeia User Mode Scheduler.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 11 Aug 2023 09:53:08 +0000 (17:53 +0800)]
drm/amd/pm: add fan acoustic limit OD setting support for SMU13
Add SMU13 fan acoustic limit OD setting support.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 11 Aug 2023 08:13:59 +0000 (16:13 +0800)]
drm/amd/pm: add fan temperature/pwm curve OD setting support for SMU13
Add SMU13 fan temperature/pwm curve OD setting support.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Saleemkhan Jamadar [Wed, 30 Aug 2023 06:30:08 +0000 (12:00 +0530)]
drm/amdgpu/jpeg: initialize number of jpeg ring
Initialize number of jpeg ring for vcn 4.0.5.
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 25 Aug 2023 13:28:00 +0000 (15:28 +0200)]
drm/amdgpu: fix amdgpu_cs_p1_user_fence
The offset is just 32bits here so this can potentially overflow if
somebody specifies a large value. Instead reduce the size to calculate
the last possible offset.
The error handling path incorrectly drops the reference to the user
fence BO resulting in potential reference count underflow.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 11 Aug 2023 07:14:46 +0000 (15:14 +0800)]
drm/amdgpu: revise the device initialization sequences
By placing the sysfs interfaces creation after `.late_int`. Since some
operations performed during `.late_init` may affect how the sysfs
interfaces should be created.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 10 Aug 2023 07:57:35 +0000 (15:57 +0800)]
drm/amd/pm: introduce a new set of OD interfaces
There will be multiple interfaces(sysfs files) exposed with each representing
a single OD functionality. And all those interface will be arranged in a tree
liked hierarchy with the top dir as "gpu_od". Meanwhile all functionalities
for the same component will be arranged under the same directory.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 10 May 2023 08:08:24 +0000 (16:08 +0800)]
drm/amdgpu: add UMSCH IP BLOCK TYPE definition
Add IP BLOCK TYPE definition for Multimedia User Mode Scheduler
which is a hardware scheduler for VCN and VPE workload.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Darren Powell [Wed, 29 Mar 2023 21:27:55 +0000 (17:27 -0400)]
amdgpu/pm: Optimize emit_clock_levels for arcturus - part 3
split switch statement into two and consolidate the common
code for printing most of the types of clock speeds
Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Fri, 14 Jul 2023 19:45:42 +0000 (15:45 -0400)]
drm/amdgpu: add UMSCH 4.0 register headers
Add headers for UMSCH 4.0.
v2: updates (Alex)
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Saleemkhan Jamadar [Thu, 27 Jul 2023 10:40:20 +0000 (16:10 +0530)]
drm/amdgpu: enable PG flags for VCN
Enable PG flags for VCN and Jpeg on IP 11_5_0
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Saleemkhan Jamadar [Tue, 13 Jun 2023 12:02:05 +0000 (17:32 +0530)]
drm/amdgpu/discovery: add VCN 4.0.5 Support
Enable VCN 4.0.5 on gc 11_5_0.
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Saleemkhan Jamadar [Wed, 28 Jun 2023 05:17:31 +0000 (10:47 +0530)]
drm/amdgpu/soc21: Add video cap query support for VCN_4_0_5
Added the video capability query support for VCN version 4_0_5
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Saleemkhan Jamadar [Tue, 13 Jun 2023 09:38:01 +0000 (15:08 +0530)]
drm/amdgpu:enable CG and PG flags for VCN
Enable CG and PG flags for VCN on IP 11_5_0
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Saleemkhan Jamadar [Tue, 13 Jun 2023 11:20:49 +0000 (16:50 +0530)]
drm/amdgpu: add VCN_4_0_5 firmware support
Add VCN_4_0_5 firmware support
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Saleemkhan Jamadar [Tue, 13 Jun 2023 11:03:20 +0000 (16:33 +0530)]
drm/amdgpu/jpeg: add jpeg support for VCN4_0_5
Add jpeg support for VCN4_0_5
v2 - update license year (Leo Liu)
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Saleemkhan Jamadar [Tue, 13 Jun 2023 11:02:23 +0000 (16:32 +0530)]
drm/amdgpu: add VCN4 ip block support
Add VCN 4.0.5 initialization and decoder/encoder ring functions.
v2 - update license year (Leo Liu)
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Saleemkhan Jamadar [Fri, 14 Jul 2023 19:47:32 +0000 (15:47 -0400)]
drm/amdgpu: add vcn 4_0_5 header files
Add VCN 4.0.5 registers
v2 - Add license header (Alexander Deucher)
v3 - updates (Alex)
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Tue, 27 Jun 2023 01:44:41 +0000 (09:44 +0800)]
drm/amdgpu: fix VPE front door loading issue
Implement proper front door loading for vpe 6.1.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 31 May 2023 04:19:54 +0000 (12:19 +0800)]
drm/amdgpu: add VPE FW version query support
Add support to query VPE FW version.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 13 Jul 2022 03:34:20 +0000 (11:34 +0800)]
drm/amdgpu: enable VPE for VPE 6.1.0
Enable Video Processing Engine on SoCs
that contain VPE 6.1.0.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Mon, 19 Dec 2022 06:45:57 +0000 (14:45 +0800)]
drm/amdgpu: add user space CS support for VPE
Enable command submission to VPE from user space.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Tue, 9 May 2023 00:26:37 +0000 (08:26 +0800)]
drm/amdgpu: add PSP loading support for VPE
Add PSP loading support for Video Processing Engine.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Mon, 23 May 2022 02:13:21 +0000 (10:13 +0800)]
drm/amdgpu: add VPE 6.1.0 support
Add skeleton driver code. (Ray)
Add initial support for Video Processing Engine. (Lang)
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Tue, 18 Jul 2023 20:29:38 +0000 (16:29 -0400)]
drm/amdgpu: add nbio 7.11 callback for VPE
Add nbio callback to configure doorbell settings.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Tue, 18 Jul 2023 20:29:06 +0000 (16:29 -0400)]
drm/amdgpu: add nbio callback for VPE
Add nbio callback to configure doorbell settings.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Sat, 6 May 2023 02:09:32 +0000 (10:09 +0800)]
drm/amdgpu: add PSP FW TYPE for VPE
Add PSP FW TYPE for Video Processing Engine.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Tue, 9 May 2023 00:16:46 +0000 (08:16 +0800)]
drm/amdgpu: add UCODE ID for VPE
Add UCODE ID for Video Processing Engine.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Thu, 12 May 2022 03:22:31 +0000 (11:22 +0800)]
drm/amdgpu: add support for VPE firmware name decoding
Add decoding VPE firmware name support.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 13 Jul 2022 03:10:45 +0000 (11:10 +0800)]
drm/amdgpu: add doorbell index for VPE
Add doorbell index for Video Processing Engine.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Mon, 23 May 2022 02:06:58 +0000 (10:06 +0800)]
drm/amdgpu: add irq src id definitions for VPE
The irq src id is used to route interrupts to
the corresponding handlers.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Mon, 23 May 2022 02:13:21 +0000 (10:13 +0800)]
drm/amdgpu: add IH CLIENT ID for VPE
Add Interrupt Handler Client ID for
Video Processing Engine.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Fri, 17 Jun 2022 02:35:47 +0000 (10:35 +0800)]
drm/amdgpu: add HWID for VPE
Add HWID for Video Processing Engine.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Mon, 16 Jan 2023 05:11:59 +0000 (13:11 +0800)]
drm/amdgpu: add VPE firmware interface
Add initial firmware interface. (Ray)
Add more opcodes and rename to vpe_v6_1. (Lang)
v2: Update copyright date (Alex)
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Tue, 31 May 2022 06:22:16 +0000 (14:22 +0800)]
drm/amdgpu: add VPE firmware header definition
Add firmware header definition for Video Processing Engine.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Sun, 24 Apr 2022 12:44:35 +0000 (20:44 +0800)]
drm/amdgpu: add VPE HW IP BLOCK definition
Add HW IP BLOCK for Video Processing Engine.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Sat, 23 Apr 2022 14:37:43 +0000 (22:37 +0800)]
drm/amdgpu: add VPE IP BLOCK definition
Add IP BLOCK for Video Processing Engine.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Sat, 23 Apr 2022 14:15:43 +0000 (22:15 +0800)]
drm/amdgpu: add VPE RING TYPE definition
Add RING TYPE for Video Processing Engine.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Sat, 23 Apr 2022 14:13:06 +0000 (22:13 +0800)]
drm/amdgpu: add VPE HW IP definition
Add HW IP for Video Processing Engine
to support user space CS.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Fri, 14 Jul 2023 19:50:24 +0000 (15:50 -0400)]
drm/amdgpu: add VPE 6.1.0 header files
Add initial headers. (Ray)
Update to align with hardware changes. (Lang)
Updates (Alex)
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Srinivasan Shanmugam [Thu, 27 Jul 2023 02:32:46 +0000 (08:02 +0530)]
drm/amdgpu: Fix printk_ratelimit() with DRM_ERROR_RATELIMITED in 'amdgpu_cs_ioctl'
Replaced printk_ratelimit() with its DRM equivalent to avoid flooding of
dmesg logs & hence fixes the following:
WARNING: Prefer printk_ratelimited or pr_<level>_ratelimited to printk_ratelimit
+ if (printk_ratelimit())
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hamza Mahfooz [Tue, 29 Aug 2023 11:27:15 +0000 (07:27 -0400)]
Revert "Revert "drm/amd/display: Implement zpos property""
This reverts commit
e2066eb4efe0e7d2d329d6e6765ed637a523ac45.
The problematic IGT test case (i.e. kms_atomic@plane-immutable-zpos) has
been fixed as of commit
cb77add45011 ("tests/kms_atomic: remove zpos <
N-planes assert") to the IGT repo. So, reintroduce the reverted code.
Link: https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/commit/cb77add45011b129e21f3cb2a4089a73dde56179
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Srinivasan Shanmugam [Fri, 4 Aug 2023 05:46:41 +0000 (11:16 +0530)]
drm/amdgpu: Use READ_ONCE() when reading the values in 'sdma_v4_4_2_ring_get_rptr'
Use READ_ONCE() instead of declaring the pointer volatile. To prevent
the compiler from refetching or reordering the read, so that the read
value is always consistent.
Link: https://lwn.net/Articles/624126/
Cc: Felix Kuehling <Felix.Kuehling@amd.com>
Cc: Guchun Chen <guchun.chen@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Cc: Le Ma <le.ma@amd.com>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yifan Zhang [Thu, 17 Aug 2023 06:53:37 +0000 (14:53 +0800)]
drm/amdgpu: remove unused parameter in amdgpu_vmid_grab_idle
amdgpu_vm is not used in amdgpu_vmid_grab_idle.
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Asad Kamal [Fri, 25 Aug 2023 07:52:19 +0000 (15:52 +0800)]
drm/amdkfd: Replace pr_err with dev_err
Replace pr_err with dev_err to show the bus-id of
failing device with kfd queue errors
Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Darren Powell [Thu, 20 Apr 2023 23:48:08 +0000 (19:48 -0400)]
amdgpu/pm: Optimize emit_clock_levels for arcturus - part 2
Use variables to remove ternary expression in print statement and
improve readability. This will help to optimize the code duplication
in the switch statement
Also Changed:
replaced single_dpm_table->count as iterator in for loops with safer
clocks_num_levels value
replaced dpm_table.value usage with local var clocks_mhz
Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Darren Powell [Wed, 29 Mar 2023 20:22:36 +0000 (16:22 -0400)]
amdgpu/pm: Optimize emit_clock_levels for arcturus - part 1
Use variables to remove the multiple nested ternary expressions and
improve readability. This will help to optimize the code duplication
in the switch statement
Also Changed:
Modify function arcturus_get_clk_table to void function as it
always returns 0
Use const string "attempt_string" to cut down on repetition
Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jay Cornwall [Fri, 25 Aug 2023 16:18:41 +0000 (12:18 -0400)]
drm/amdkfd: Add missing gfx11 MQD manager callbacks
mqd_stride function was introduced in commit
2f77b9a242a2
("drm/amdkfd: Update MQD management on multi XCC setup")
but not assigned for gfx11. Fixes a NULL dereference in debugfs.
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Tue, 29 Aug 2023 15:20:27 +0000 (23:20 +0800)]
drm/amdgpu: Free ras cmd input buffer properly
Do not access the pointer for ras input cmd buffer
if it is even not allocated.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Stanley Yang <Stanley.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Srinivasan Shanmugam [Tue, 29 Aug 2023 04:48:49 +0000 (10:18 +0530)]
drm/amd/display: Adjust kdoc for 'optc35_set_odm_combine'
Fixes the following W=1 kernel build warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn35/dcn35_optc.c:46: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* Enable CRTC
Cc: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ma Jun [Fri, 25 Aug 2023 03:11:51 +0000 (11:11 +0800)]
drm/amd: Simplify the bo size check funciton
Simplify the code logic of size check function amdgpu_bo_validate_size
Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rajneesh Bhardwaj [Thu, 24 Aug 2023 15:16:40 +0000 (11:16 -0400)]
drm/amdgpu: Hide xcp partition sysfs under SRIOV
XCP partitions should not be visible for the VF for GFXIP 9.4.3.
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harish Kasiviswanathan [Thu, 10 Aug 2023 16:10:57 +0000 (12:10 -0400)]
drm/amdkfd: ratelimited SQ interrupt messages
No functional change. Use ratelimited version of pr_ to avoid
overflowing of dmesg buffer
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Philip Yang <philip.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Fri, 25 Aug 2023 07:13:57 +0000 (15:13 +0800)]
drm/amdgpu: use read-modify-write mode for gfx v9_4_3 SQ setting
Instead of using direct update, avoid touching unrelated fields.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
ZhenGuo Yin [Mon, 28 Aug 2023 06:18:52 +0000 (14:18 +0800)]
drm/amdgpu: access RLC_SPM_MC_CNTL through MMIO in SRIOV runtime
Register RLC_SPM_MC_CNTL is not blocked by L1 policy, VF can
directly access it through MMIO during SRIOV runtime.
v2: use SOC15 interface to access registers
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: ZhenGuo Yin <zhenguo.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lee Jones [Thu, 24 Aug 2023 07:36:53 +0000 (08:36 +0100)]
drm/amd/amdgpu/sdma_v6_0: Demote a bunch of half-completed function headers
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:248: warning: Function parameter or member 'job' not described in 'sdma_v6_0_ring_emit_ib'
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:248: warning: Function parameter or member 'flags' not described in 'sdma_v6_0_ring_emit_ib'
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:945: warning: Function parameter or member 'timeout' not described in 'sdma_v6_0_ring_test_ib'
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:1124: warning: Function parameter or member 'ring' not described in 'sdma_v6_0_ring_pad_ib'
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:1175: warning: Function parameter or member 'vmid' not described in 'sdma_v6_0_ring_emit_vm_flush'
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:1175: warning: Function parameter or member 'pd_addr' not described in 'sdma_v6_0_ring_emit_vm_flush'
Cc: linaro-mm-sig@lists.linaro.org
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Sierra [Mon, 28 Aug 2023 14:47:21 +0000 (09:47 -0500)]
drm/amdkfd: use mask to get v9 interrupt sq data bits correctly
Interrupt sq data bits were not taken properly from contextid0 and contextid1.
Use macro KFD_CONTEXT_ID_GET_SQ_INT_DATA instead.
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 06:34:54 +0000 (02:34 -0400)]
drm/amd/display: Add DCN35 DM Support
[Why & How]
Add DM handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 06:30:59 +0000 (02:30 -0400)]
drm/amd/display: Add DCN35 CORE
[Why & How]
Add DCN35 support in dc_resource.c.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
André Almeida [Thu, 17 Aug 2023 18:20:46 +0000 (15:20 -0300)]
drm/amdgpu: Allocate coredump memory in a nonblocking way
During a GPU reset, a normal memory reclaim could block to reclaim
memory. Giving that coredump is a best effort mechanism, it shouldn't
disturb the reset path. Change its memory allocation flag to a
nonblocking one.
Signed-off-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 22:39:23 +0000 (18:39 -0400)]
drm/amd/display: Add DCN35 blocks to Makefile
[Why & How]
Enable DCN35 in makefile.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 06:28:55 +0000 (02:28 -0400)]
drm/amd/display: Add DCN35 DML
[Why & How]
Add DML handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 06:10:55 +0000 (02:10 -0400)]
drm/amd/display: Add DCN35 Resource
[Why & How]
Add resource handling for DCN35.
v2: drop unused guard
v3: drop dml2 dependencies for now (Alex)
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 06:10:06 +0000 (02:10 -0400)]
drm/amd/display: Add DCN35 init
[Why & How]
Add init files for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 04:32:52 +0000 (00:32 -0400)]
drm/amd/display: Add DCN35 DMUB
[Why & How]
Add DMUB handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 03:41:53 +0000 (23:41 -0400)]
drm/amd/display: Add DCN35 IRQ
[Why & How]
- Add IRQ handling for DCN35
- Update IRQ files for other DCNs in accordance
to change in irq_service.h
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 03:37:49 +0000 (23:37 -0400)]
drm/amd/display: Add DCN35 CLK_MGR
[Why & How]
Add CLK_MGR handling for DCN35.
v2: Drop stale SMU interfaces (Alex)
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 05:44:52 +0000 (01:44 -0400)]
drm/amd/display: Add DCN35 HWSEQ
[Why & How]
Add HWSEQ handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 05:43:51 +0000 (01:43 -0400)]
drm/amd/display: Add DCN35 DSC
[Why & How]
Add DSC handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 05:43:19 +0000 (01:43 -0400)]
drm/amd/display: Add DCN35 MMHUBBUB
[Why & How]
Add MMHUBBUB handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 05:42:51 +0000 (01:42 -0400)]
drm/amd/display: Add DCN35 HUBBUB
[Why & How]
Add HUBBUB handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Thu, 3 Aug 2023 05:42:21 +0000 (01:42 -0400)]
drm/amd/display: Add DCN35 HUBP
[Why & How]
Add HUBP handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>