From: Peng Fan Date: Wed, 20 May 2020 05:51:28 +0000 (+0800) Subject: ARM: imx: move cpu definitions into a header X-Git-Tag: microblaze-v5.10~635^2~14^2~1 X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=f72130c6b62e45df18ca7568d13f5402c2f58115;p=linux-2.6-microblaze.git ARM: imx: move cpu definitions into a header The soc device register code will be moved to drivers/soc/imx/, the code needs the cpu type definitions. So let's move the cpu type definitions to a header. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo --- diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index 48e6d781f15b..fe2d0f5abfcc 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -8,41 +8,15 @@ #define __ASM_ARCH_MXC_H__ #include +#include #ifndef __ASM_ARCH_MXC_HARDWARE_H__ #error "Do not include directly." #endif -#define MXC_CPU_MX1 1 -#define MXC_CPU_MX21 21 -#define MXC_CPU_MX25 25 -#define MXC_CPU_MX27 27 -#define MXC_CPU_MX31 31 -#define MXC_CPU_MX35 35 -#define MXC_CPU_MX51 51 -#define MXC_CPU_MX53 53 -#define MXC_CPU_IMX6SL 0x60 -#define MXC_CPU_IMX6DL 0x61 -#define MXC_CPU_IMX6SX 0x62 -#define MXC_CPU_IMX6Q 0x63 -#define MXC_CPU_IMX6UL 0x64 -#define MXC_CPU_IMX6ULL 0x65 -/* virtual cpu id for i.mx6ulz */ -#define MXC_CPU_IMX6ULZ 0x6b -#define MXC_CPU_IMX6SLL 0x67 -#define MXC_CPU_IMX7D 0x72 -#define MXC_CPU_IMX7ULP 0xff - -#define MXC_CPU_VFx10 0x010 -#define MXC_CPU_VF500 0x500 -#define MXC_CPU_VF510 (MXC_CPU_VF500 | MXC_CPU_VFx10) -#define MXC_CPU_VF600 0x600 -#define MXC_CPU_VF610 (MXC_CPU_VF600 | MXC_CPU_VFx10) - #define IMX_DDR_TYPE_LPDDR2 1 #ifndef __ASSEMBLY__ -extern unsigned int __mxc_cpu_type; #ifdef CONFIG_SOC_IMX6SL static inline bool cpu_is_imx6sl(void) diff --git a/include/soc/imx/cpu.h b/include/soc/imx/cpu.h new file mode 100644 index 000000000000..42d6aeb951fa --- /dev/null +++ b/include/soc/imx/cpu.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __IMX_CPU_H__ +#define __IMX_CPU_H__ + +#define MXC_CPU_MX1 1 +#define MXC_CPU_MX21 21 +#define MXC_CPU_MX25 25 +#define MXC_CPU_MX27 27 +#define MXC_CPU_MX31 31 +#define MXC_CPU_MX35 35 +#define MXC_CPU_MX51 51 +#define MXC_CPU_MX53 53 +#define MXC_CPU_IMX6SL 0x60 +#define MXC_CPU_IMX6DL 0x61 +#define MXC_CPU_IMX6SX 0x62 +#define MXC_CPU_IMX6Q 0x63 +#define MXC_CPU_IMX6UL 0x64 +#define MXC_CPU_IMX6ULL 0x65 +/* virtual cpu id for i.mx6ulz */ +#define MXC_CPU_IMX6ULZ 0x6b +#define MXC_CPU_IMX6SLL 0x67 +#define MXC_CPU_IMX7D 0x72 +#define MXC_CPU_IMX7ULP 0xff + +#define MXC_CPU_VFx10 0x010 +#define MXC_CPU_VF500 0x500 +#define MXC_CPU_VF510 (MXC_CPU_VF500 | MXC_CPU_VFx10) +#define MXC_CPU_VF600 0x600 +#define MXC_CPU_VF610 (MXC_CPU_VF600 | MXC_CPU_VFx10) + +#ifndef __ASSEMBLY__ +extern unsigned int __mxc_cpu_type; +#endif + +#endif