From: Qiuxu Zhuo Date: Tue, 25 Sep 2018 00:03:43 +0000 (-0700) Subject: x86/mce: Add macros for the corrected error count bit field X-Git-Tag: microblaze-v5.0-rc1~178^2~1 X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=e5276b1ffa97e3883802f40a5e3a167fe1cb1d20;p=linux-2.6-microblaze.git x86/mce: Add macros for the corrected error count bit field The bit field [52:38] of MCi_STATUS contains the corrected error count. Add {*_SHIFT|*_MASK|*_CEC(c)} macros for it. [ bp: use GENMASK_ULL. ] Signed-off-by: Qiuxu Zhuo Signed-off-by: Tony Luck Signed-off-by: Borislav Petkov Cc: Aristeu Rozanski Cc: Mauro Carvalho Chehab Cc: linux-edac@vger.kernel.org Cc: x86@kernel.org Link: https://lkml.kernel.org/r/20180925000343.GB5998@agluck-desk --- diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 6f95047179eb..97d6969f9a8a 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -39,6 +39,9 @@ #define MCI_STATUS_PCC BIT_ULL(57) /* processor context corrupt */ #define MCI_STATUS_S BIT_ULL(56) /* Signaled machine check */ #define MCI_STATUS_AR BIT_ULL(55) /* Action required */ +#define MCI_STATUS_CEC_SHIFT 38 /* Corrected Error Count */ +#define MCI_STATUS_CEC_MASK GENMASK_ULL(52,38) +#define MCI_STATUS_CEC(c) (((c) & MCI_STATUS_CEC_MASK) >> MCI_STATUS_CEC_SHIFT) /* AMD-specific bits */ #define MCI_STATUS_TCC BIT_ULL(55) /* Task context corrupt */