From: Palmer Dabbelt Date: Fri, 8 Sep 2023 17:12:55 +0000 (-0700) Subject: Merge patch series "riscv: dma-mapping: unify support for cache flushes" X-Git-Tag: microblaze-v6.8~486^2~8 X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=7f215d003f31d56b458c7c3c8c7185a1697f5076;p=linux-2.6-microblaze.git Merge patch series "riscv: dma-mapping: unify support for cache flushes" Prabhakar says: From: Lad Prabhakar This patch series is a subset from Arnd's original series [0]. Ive just picked up the bits required for RISC-V unification of cache flushing. Remaining patches from the series [0] will be taken care by Arnd soon. * b4-shazam-merge: riscv: dma-mapping: switch over to generic implementation riscv: dma-mapping: skip invalidation before bidirectional DMA riscv: dma-mapping: only invalidate after DMA, not flush Link: https://lore.kernel.org/r/20230816232336.164413-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Palmer Dabbelt --- 7f215d003f31d56b458c7c3c8c7185a1697f5076 diff --cc arch/riscv/mm/dma-noncoherent.c index 7270b4d8c05b,06b8fea58e20..f269990e26c3 --- a/arch/riscv/mm/dma-noncoherent.c +++ b/arch/riscv/mm/dma-noncoherent.c @@@ -11,11 -11,22 +11,24 @@@ #include static bool noncoherent_supported __ro_after_init; +int dma_cache_alignment __ro_after_init = ARCH_DMA_MINALIGN; +EXPORT_SYMBOL_GPL(dma_cache_alignment); - void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, - enum dma_data_direction dir) + static inline void arch_dma_cache_wback(phys_addr_t paddr, size_t size) + { + void *vaddr = phys_to_virt(paddr); + + ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); + } + + static inline void arch_dma_cache_inv(phys_addr_t paddr, size_t size) + { + void *vaddr = phys_to_virt(paddr); + + ALT_CMO_OP(inval, vaddr, size, riscv_cbom_block_size); + } + + static inline void arch_dma_cache_wback_inv(phys_addr_t paddr, size_t size) { void *vaddr = phys_to_virt(paddr);