From: Thierry Reding <treding@nvidia.com>
Date: Fri, 20 Nov 2020 20:27:12 +0000 (+0100)
Subject: ARM: tegra: Properly align clocks for SOCTHERM
X-Git-Tag: microblaze-v5.12~94^2~41^2~10
X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=6fb123f1f5a42136161b7782d9635a684f3036d2;p=linux-2.6-microblaze.git

ARM: tegra: Properly align clocks for SOCTHERM

Entries on subsequent lines should be aligned with the entry on the
first line.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 27fb6a49118f..d7001b27c3e6 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -902,7 +902,7 @@
 			     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "thermal", "edp";
 		clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
-			<&tegra_car TEGRA124_CLK_SOC_THERM>;
+			 <&tegra_car TEGRA124_CLK_SOC_THERM>;
 		clock-names = "tsensor", "soctherm";
 		resets = <&tegra_car 78>;
 		reset-names = "soctherm";