From: Mark Brown Date: Sat, 10 Jun 2023 13:56:26 +0000 (+0100) Subject: ASoC: cs42l42: Use maple tree register cache X-Git-Tag: microblaze-v6.6~24^2~15^2~59^2~4 X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=6b7fed83c9455f64a1509a9e1d512a92edaaf44e;p=linux-2.6-microblaze.git ASoC: cs42l42: Use maple tree register cache The cs42l42 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-6-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown --- diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index 8aa6af21e52c..a0de0329406a 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -393,7 +393,7 @@ const struct regmap_config cs42l42_regmap = { .max_register = CS42L42_MAX_REGISTER, .reg_defaults = cs42l42_reg_defaults, .num_reg_defaults = ARRAY_SIZE(cs42l42_reg_defaults), - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_MAPLE, .use_single_read = true, .use_single_write = true,