From: Max Filippov Date: Thu, 18 Feb 2021 18:18:00 +0000 (-0800) Subject: xtensa: ISS: add GDBIO implementation to semihosting interface X-Git-Tag: microblaze-v5.14~93^2 X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=6a8eb99e130f3f7658de2776934374fe1c41279e;p=linux-2.6-microblaze.git xtensa: ISS: add GDBIO implementation to semihosting interface Add GDBIO implementation for the xtensa semihosting interface. It offers less functions than the simcall interface, so make some semihosting functions optional and return error when implementation is not available. Add Kconfig menu to select semihosting implementation and add simcall and GDBIO choices there. Signed-off-by: Max Filippov --- diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index d637b396f81c..6ad4c1161518 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -393,6 +393,28 @@ config PARSE_BOOTPARAM If unsure, say Y. +choice + prompt "Semihosting interface" + default XTENSA_SIMCALL_ISS + depends on XTENSA_PLATFORM_ISS + help + Choose semihosting interface that will be used for serial port, + block device and networking. + +config XTENSA_SIMCALL_ISS + bool "simcall" + help + Use simcall instruction. simcall is only available on simulators, + it does nothing on hardware. + +config XTENSA_SIMCALL_GDBIO + bool "GDBIO" + help + Use break instruction. It is available on real hardware when GDB + is attached to it via JTAG. + +endchoice + config BLK_DEV_SIMDISK tristate "Host file-based simulated block device support" default n diff --git a/arch/xtensa/platforms/iss/include/platform/simcall-gdbio.h b/arch/xtensa/platforms/iss/include/platform/simcall-gdbio.h new file mode 100644 index 000000000000..e642860e25a8 --- /dev/null +++ b/arch/xtensa/platforms/iss/include/platform/simcall-gdbio.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2021 Cadence Design Systems Inc. */ + +#ifndef _XTENSA_PLATFORM_ISS_SIMCALL_GDBIO_H +#define _XTENSA_PLATFORM_ISS_SIMCALL_GDBIO_H + +/* + * System call like services offered by the GDBIO host. + */ + +#define SYS_open -2 +#define SYS_close -3 +#define SYS_read -4 +#define SYS_write -5 +#define SYS_lseek -6 + +static int errno; + +static inline int __simc(int a, int b, int c, int d) +{ + register int a1 asm("a2") = a; + register int b1 asm("a6") = b; + register int c1 asm("a3") = c; + register int d1 asm("a4") = d; + __asm__ __volatile__ ( + "break 1, 14\n" + : "+r"(a1), "+r"(c1) + : "r"(b1), "r"(d1) + : "memory"); + errno = c1; + return a1; +} + +#endif /* _XTENSA_PLATFORM_ISS_SIMCALL_GDBIO_H */ diff --git a/arch/xtensa/platforms/iss/include/platform/simcall.h b/arch/xtensa/platforms/iss/include/platform/simcall.h index 612080bf0b3d..e1ec50ce39ee 100644 --- a/arch/xtensa/platforms/iss/include/platform/simcall.h +++ b/arch/xtensa/platforms/iss/include/platform/simcall.h @@ -12,11 +12,23 @@ #ifndef _XTENSA_PLATFORM_ISS_SIMCALL_H #define _XTENSA_PLATFORM_ISS_SIMCALL_H +#include + +#ifdef CONFIG_XTENSA_SIMCALL_ISS #include +#endif +#ifdef CONFIG_XTENSA_SIMCALL_GDBIO +#include +#endif static inline int simc_exit(int exit_code) { +#ifdef SYS_exit return __simc(SYS_exit, exit_code, 0, 0); +#else + WARN_ONCE(1, "%s: not implemented\n", __func__); + return -1; +#endif } static inline int simc_open(const char *file, int flags, int mode) @@ -31,7 +43,12 @@ static inline int simc_close(int fd) static inline int simc_ioctl(int fd, int request, void *arg) { +#ifdef SYS_ioctl return __simc(SYS_ioctl, fd, request, (int) arg); +#else + WARN_ONCE(1, "%s: not implemented\n", __func__); + return -1; +#endif } static inline int simc_read(int fd, void *buf, size_t count) @@ -46,9 +63,14 @@ static inline int simc_write(int fd, const void *buf, size_t count) static inline int simc_poll(int fd) { +#ifdef SYS_select_one long timeval[2] = { 0, 0 }; return __simc(SYS_select_one, fd, XTISS_SELECT_ONE_READ, (int)&timeval); +#else + WARN_ONCE(1, "%s: not implemented\n", __func__); + return -1; +#endif } static inline int simc_lseek(int fd, uint32_t off, int whence) @@ -58,17 +80,31 @@ static inline int simc_lseek(int fd, uint32_t off, int whence) static inline int simc_argc(void) { +#ifdef SYS_iss_argc return __simc(SYS_iss_argc, 0, 0, 0); +#else + WARN_ONCE(1, "%s: not implemented\n", __func__); + return 0; +#endif } static inline int simc_argv_size(void) { +#ifdef SYS_iss_argv_size return __simc(SYS_iss_argv_size, 0, 0, 0); +#else + WARN_ONCE(1, "%s: not implemented\n", __func__); + return 0; +#endif } static inline void simc_argv(void *buf) { +#ifdef SYS_iss_set_argv __simc(SYS_iss_set_argv, (int)buf, 0, 0); +#else + WARN_ONCE(1, "%s: not implemented\n", __func__); +#endif } #endif /* _XTENSA_PLATFORM_ISS_SIMCALL_H */