From: Palmer Dabbelt Date: Fri, 2 Dec 2022 18:04:41 +0000 (-0800) Subject: Merge patch series "RISC-V: Dynamic ftrace support for RV32I" X-Git-Tag: microblaze-v6.6~1528^2~23 X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=5f66e18755963537d6cd125bde4ec559f2991a75;p=linux-2.6-microblaze.git Merge patch series "RISC-V: Dynamic ftrace support for RV32I" Jamie Iles says: This series enables dynamic ftrace support for RV32I bringing it to parity with RV64I. Most of the work is already there, this is largely just assembly fixes to handle register sizes, correct handling of the psABI calling convention and Kconfig change. Validated with all ftrace boot time self test with qemu for RV32I and RV64I in addition to real tracing on an RV32I FPGA design. * b4-shazam-merge: RISC-V: enable dynamic ftrace for RV32I RISC-V: preserve a1 in mcount RISC-V: reduce mcount save space on RV32 RISC-V: use REG_S/REG_L for mcount Link: https://lore.kernel.org/r/20221115200832.706370-1-jamie@jamieiles.com Signed-off-by: Palmer Dabbelt --- 5f66e18755963537d6cd125bde4ec559f2991a75