From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Date: Tue, 16 May 2023 15:45:37 +0000 (+0200)
Subject: arm64: dts: qcom: sm8550: enable DISPCC by default
X-Git-Tag: microblaze-v6.6~145^2~20^2~89
X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=5ef00c06ea5e4e0de1f63d2c620f671750f73f9b;p=linux-2.6-microblaze.git

arm64: dts: qcom: sm8550: enable DISPCC by default

Enable the Display Clock Controller by default in SoC DTSI so unused
clocks can be turned off.  It does not require any external resources,
so as core SoC component should be always available to boards.

Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516154539.238655-1-krzysztof.kozlowski@linaro.org
---

diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 785889450e8a..f27d5c657f44 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -419,10 +419,6 @@
 	};
 };
 
-&dispcc {
-	status = "okay";
-};
-
 &mdss {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 94201d08b5af..473ab1831ab1 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2697,7 +2697,6 @@
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 			#power-domain-cells = <1>;
-			status = "disabled";
 		};
 
 		usb_1_hsphy: phy@88e3000 {