From: Alexandre Belloni Date: Thu, 2 Feb 2017 18:51:39 +0000 (+0100) Subject: ARM: dts: at91: sama5d2: add sfrbu X-Git-Tag: microblaze-4.13-rc1~134^2~12^2~6 X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=4ea5a9ef3c1285a62bc274be7638a4c894f64826;p=linux-2.6-microblaze.git ARM: dts: at91: sama5d2: add sfrbu SFRBU, the Special Function Registers Backup manage specific aspects of the integrated memory, bridge implementations, processor and other functionality not controlled elsewhere. Signed-off-by: Alexandre Belloni --- diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt index 29737b9b616e..799af90dd75b 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.txt +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt @@ -217,7 +217,8 @@ memory, bridge implementations, processor and other functionality not controlled elsewhere. required properties: -- compatible: Should be "atmel,-sfr", "syscon". +- compatible: Should be "atmel,-sfr", "syscon" or + "atmel,-sfrbu", "syscon" can be "sama5d3", "sama5d4" or "sama5d2". - reg: Should contain registers location and length diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 22332be72140..468ef9ceb2e3 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -1305,6 +1305,11 @@ status = "okay"; }; + sfrbu: sfr@fc05c000 { + compatible = "atmel,sama5d2-sfrbu", "syscon"; + reg = <0xfc05c000 0x20>; + }; + chipid@fc069000 { compatible = "atmel,sama5d2-chipid"; reg = <0xfc069000 0x8>;