From: Catalin Marinas <catalin.marinas@arm.com>
Date: Fri, 31 Jul 2020 17:09:50 +0000 (+0100)
Subject: Merge branch 'for-next/tlbi' into for-next/core
X-Git-Tag: microblaze-v5.10~58^2~4
X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=18aa3bd58b1428d1927fe11f85ad444423d4fc59;p=linux-2.6-microblaze.git

Merge branch 'for-next/tlbi' into for-next/core

* for-next/tlbi:
  : Support for TTL (translation table level) hint in the TLB operations
  arm64: tlb: Use the TLBI RANGE feature in arm64
  arm64: enable tlbi range instructions
  arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature
  arm64: tlb: don't set the ttl value in flush_tlb_page_nosync
  arm64: Shift the __tlbi_level() indentation left
  arm64: tlb: Set the TTL field in flush_*_tlb_range
  arm64: tlb: Set the TTL field in flush_tlb_range
  tlb: mmu_gather: add tlb_flush_*_range APIs
  arm64: Add tlbi_user_level TLB invalidation helper
  arm64: Add level-hinted TLB invalidation helper
  arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors
  arm64: Detect the ARMv8.4 TTL feature
---

18aa3bd58b1428d1927fe11f85ad444423d4fc59