From: Rex Zhu Date: Mon, 8 Jan 2018 08:50:59 +0000 (+0800) Subject: drm/amd/pp: Add memory clock info display on Cz/St X-Git-Tag: microblaze-v4.18-rc1~5^2~30^2~268 X-Git-Url: http://git.monstr.eu/?a=commitdiff_plain;h=039fdc94c15a5244410449dce59ff6df73ba39d7;p=linux-2.6-microblaze.git drm/amd/pp: Add memory clock info display on Cz/St show mclk info as in MHz on Cz/St as 0: 333Mhz * 1: 800Mhz Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c index 0b8aa4473473..e574af1d408b 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c @@ -1582,6 +1582,7 @@ static int cz_force_clock_level(struct pp_hwmgr *hwmgr, static int cz_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) { + struct cz_hwmgr *data = (struct cz_hwmgr *)(hwmgr->backend); struct phm_clock_voltage_dependency_table *sclk_table = hwmgr->dyn_state.vddc_dependency_on_sclk; int i, now, size = 0; @@ -1599,6 +1600,18 @@ static int cz_print_clock_levels(struct pp_hwmgr *hwmgr, i, sclk_table->entries[i].clk / 100, (i == now) ? "*" : ""); break; + case PP_MCLK: + now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, + CGS_IND_REG__SMC, + ixTARGET_AND_CURRENT_PROFILE_INDEX), + TARGET_AND_CURRENT_PROFILE_INDEX, + CURR_MCLK_INDEX); + + for (i = CZ_NUM_NBPMEMORYCLOCK; i > 0; i--) + size += sprintf(buf + size, "%d: %uMhz %s\n", + CZ_NUM_NBPMEMORYCLOCK-i, data->sys_info.nbp_memory_clock[i-1] / 100, + (CZ_NUM_NBPMEMORYCLOCK-i == now) ? "*" : ""); + break; default: break; }