net: stmmac: dwmac-qcom-ethqos: Enable RGMII functional clock on resume

When the Qualcomm ethqos driver is properly described in its associated
GDSC power-domain, the hardware will be powered down and loose its state
between qcom_ethqos_probe() and stmmac_init_dma_engine().

The result of this is that the functional clock from the RGMII IO macro
is no longer provides and the DMA software reset in dwmac4_dma_reset()
will time out, due to lacking clock signal.

Re-enable the functional clock, as part of the Qualcomm specific clock
enablement sequence to avoid this problem.

The final clock configuration will be adjusted by ethqos_fix_mac_speed()
once the link is being brought up.

Fixes: a7c30e62d4b8 ("net: stmmac: Add driver for Qualcomm ethqos")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-and-reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20220323033255.2282930-1-bjorn.andersson@linaro.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index 0cc28c7..835caa1 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -487,6 +487,13 @@ static int ethqos_clks_config(void *priv, bool enabled)
                        dev_err(&ethqos->pdev->dev, "rgmii_clk enable failed\n");
                        return ret;
                }
+
+               /* Enable functional clock to prevent DMA reset to timeout due
+                * to lacking PHY clock after the hardware block has been power
+                * cycled. The actual configuration will be adjusted once
+                * ethqos_fix_mac_speed() is invoked.
+                */
+               ethqos_set_func_clk_en(ethqos);
        } else {
                clk_disable_unprepare(ethqos->rgmii_clk);
        }