drm/amdgpu: Fetch MES scheduler/KIQ versions
authorGraham Sider <Graham.Sider@amd.com>
Fri, 3 Jun 2022 13:53:54 +0000 (09:53 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 23 Jun 2022 21:22:05 +0000 (17:22 -0400)
Store MES scheduler and MES KIQ version numbers in amdgpu_mes for GFX11.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

index 25590b3..42f5a61 100644 (file)
@@ -65,6 +65,9 @@ struct amdgpu_mes {
 
        spinlock_t                      queue_id_lock;
 
+       uint32_t                        sched_version;
+       uint32_t                        kiq_version;
+
        uint32_t                        total_max_queue;
        uint32_t                        doorbell_id_offset;
        uint32_t                        max_doorbell_slices;
index 7eee004..ead1860 100644 (file)
@@ -858,6 +858,18 @@ static int mes_v11_0_queue_init(struct amdgpu_device *adev,
                mes_v11_0_queue_init_register(ring);
        }
 
+       /* get MES scheduler/KIQ versions */
+       mutex_lock(&adev->srbm_mutex);
+       soc21_grbm_select(adev, 3, pipe, 0, 0);
+
+       if (pipe == AMDGPU_MES_SCHED_PIPE)
+               adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
+       else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
+               adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
+
+       soc21_grbm_select(adev, 0, 0, 0, 0);
+       mutex_unlock(&adev->srbm_mutex);
+
        return 0;
 }