drm/amd/pm: update the smu v11.5 smc header for vangogh
authorXiaomeng Hou <Xiaomeng.Hou@amd.com>
Tue, 1 Dec 2020 09:49:50 +0000 (17:49 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 10 Dec 2020 21:41:50 +0000 (16:41 -0500)
Add new PMFW message to notify RLC engine status.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Lazar Lijo <Lijo.Lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/inc/smu_types.h
drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h

index 1787ae8..720d156 100644 (file)
        __SMU_DUMMY_MAP(SET_DRIVER_DUMMY_TABLE_DRAM_ADDR_LOW), \
        __SMU_DUMMY_MAP(GET_UMC_FW_WA), \
        __SMU_DUMMY_MAP(Mode1Reset), \
-       __SMU_DUMMY_MAP(Spare),                          \
+       __SMU_DUMMY_MAP(RlcPowerNotify),                 \
        __SMU_DUMMY_MAP(SetHardMinIspiclkByFreq),        \
        __SMU_DUMMY_MAP(SetHardMinIspxclkByFreq),        \
        __SMU_DUMMY_MAP(SetSoftMinSocclkByFreq),         \
index 7e69b3b..55d7892 100644 (file)
@@ -41,7 +41,7 @@
 #define PPSMC_MSG_PowerUpIspByTile                     0x7
 #define PPSMC_MSG_PowerDownVcn                         0x8 // VCN is power gated by default
 #define PPSMC_MSG_PowerUpVcn                           0x9
-#define PPSMC_MSG_spare                                0xA
+#define PPSMC_MSG_RlcPowerNotify                       0xA
 #define PPSMC_MSG_SetHardMinVcn                        0xB // For wireless display
 #define PPSMC_MSG_SetSoftMinGfxclk                     0xC //Sets SoftMin for GFXCLK. Arg is in MHz
 #define PPSMC_MSG_ActiveProcessNotify                  0xD