dt-bindings: soc: Add new board description for MicroBlaze V
authorMichal Simek <michal.simek@amd.com>
Thu, 23 Nov 2023 07:02:28 +0000 (08:02 +0100)
committerMichal Simek <michal.simek@amd.com>
Wed, 13 Dec 2023 15:52:47 +0000 (16:52 +0100)
MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
It is hardware compatible with classic MicroBlaze processor. Processor can
be used with standard AMD/Xilinx IPs including interrupt controller and
timer.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml

index 95758de..d4c0fe1 100644 (file)
@@ -132,6 +132,11 @@ properties:
           - const: xlnx,zynqmp-smk-k26
           - const: xlnx,zynqmp
 
+      - description: AMD MicroBlaze V (QEMU)
+        items:
+          - const: qemu,mbv
+          - const: amd,mbv
+
 additionalProperties: true
 
 ...