pwm: sun4i: Always calculate params when applying new parameters
authorClément Péron <peron.clem@gmail.com>
Sun, 24 Nov 2019 17:29:06 +0000 (18:29 +0100)
committerThierry Reding <thierry.reding@gmail.com>
Wed, 8 Jan 2020 11:48:33 +0000 (12:48 +0100)
Bypass mode will require to be re-calculated when the pwm state
is changed.

Remove the condition so pwm_sun4i_calculate is always called.

Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
drivers/pwm/pwm-sun4i.c

index a6727dd..e369b5a 100644 (file)
@@ -202,9 +202,9 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
 {
        struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip);
        struct pwm_state cstate;
-       u32 ctrl;
+       u32 ctrl, duty, period, val;
        int ret;
-       unsigned int delay_us;
+       unsigned int delay_us, prescaler;
        unsigned long now;
 
        pwm_get_state(pwm, &cstate);
@@ -220,43 +220,37 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
        spin_lock(&sun4i_pwm->ctrl_lock);
        ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
 
-       if ((cstate.period != state->period) ||
-           (cstate.duty_cycle != state->duty_cycle)) {
-               u32 period, duty, val;
-               unsigned int prescaler;
-
-               ret = sun4i_pwm_calculate(sun4i_pwm, state,
-                                         &duty, &period, &prescaler);
-               if (ret) {
-                       dev_err(chip->dev, "period exceeds the maximum value\n");
-                       spin_unlock(&sun4i_pwm->ctrl_lock);
-                       if (!cstate.enabled)
-                               clk_disable_unprepare(sun4i_pwm->clk);
-                       return ret;
-               }
-
-               if (PWM_REG_PRESCAL(ctrl, pwm->hwpwm) != prescaler) {
-                       /* Prescaler changed, the clock has to be gated */
-                       ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
-                       sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG);
+       ret = sun4i_pwm_calculate(sun4i_pwm, state, &duty, &period, &prescaler);
+       if (ret) {
+               dev_err(chip->dev, "period exceeds the maximum value\n");
+               spin_unlock(&sun4i_pwm->ctrl_lock);
+               if (!cstate.enabled)
+                       clk_disable_unprepare(sun4i_pwm->clk);
+               return ret;
+       }
 
-                       ctrl &= ~BIT_CH(PWM_PRESCAL_MASK, pwm->hwpwm);
-                       ctrl |= BIT_CH(prescaler, pwm->hwpwm);
-               }
+       if (PWM_REG_PRESCAL(ctrl, pwm->hwpwm) != prescaler) {
+               /* Prescaler changed, the clock has to be gated */
+               ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
+               sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG);
 
-               val = (duty & PWM_DTY_MASK) | PWM_PRD(period);
-               sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));
-               sun4i_pwm->next_period[pwm->hwpwm] = jiffies +
-                       usecs_to_jiffies(cstate.period / 1000 + 1);
-               sun4i_pwm->needs_delay[pwm->hwpwm] = true;
+               ctrl &= ~BIT_CH(PWM_PRESCAL_MASK, pwm->hwpwm);
+               ctrl |= BIT_CH(prescaler, pwm->hwpwm);
        }
 
+       val = (duty & PWM_DTY_MASK) | PWM_PRD(period);
+       sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));
+       sun4i_pwm->next_period[pwm->hwpwm] = jiffies +
+               usecs_to_jiffies(cstate.period / 1000 + 1);
+       sun4i_pwm->needs_delay[pwm->hwpwm] = true;
+
        if (state->polarity != PWM_POLARITY_NORMAL)
                ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm);
        else
                ctrl |= BIT_CH(PWM_ACT_STATE, pwm->hwpwm);
 
        ctrl |= BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
+
        if (state->enabled) {
                ctrl |= BIT_CH(PWM_EN, pwm->hwpwm);
        } else if (!sun4i_pwm->needs_delay[pwm->hwpwm]) {