drm/amdgpu: support mem copy for LSDMA
authorLikun Gao <Likun.Gao@amd.com>
Fri, 6 May 2022 18:45:54 +0000 (14:45 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 10 May 2022 21:53:11 +0000 (17:53 -0400)
Support memory to memory linear copy in PIO mode for LSDMA.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.c
drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.h
drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

index af00a66..996722f 100644 (file)
 
 #include "amdgpu.h"
 #include "amdgpu_lsdma.h"
+
+#define AMDGPU_LSDMA_MAX_SIZE  0x2000000ULL
+
+int amdgpu_lsdma_copy_mem(struct amdgpu_device *adev,
+                         uint64_t src_addr,
+                         uint64_t dst_addr,
+                         uint64_t mem_size)
+{
+       int ret;
+
+       if (mem_size == 0)
+               return -EINVAL;
+
+       while (mem_size > 0) {
+               uint64_t current_copy_size = min(mem_size, AMDGPU_LSDMA_MAX_SIZE);
+
+               ret = adev->lsdma.funcs->copy_mem(adev, src_addr, dst_addr, current_copy_size);
+               if (ret)
+                       return ret;
+               src_addr += current_copy_size;
+               dst_addr += current_copy_size;
+               mem_size -= current_copy_size;
+       }
+
+       return 0;
+}
index eae19c2..18cc7ad 100644 (file)
@@ -29,6 +29,11 @@ struct amdgpu_lsdma {
 };
 
 struct amdgpu_lsdma_funcs {
+       int (*copy_mem)(struct amdgpu_device *adev, uint64_t src_addr,
+                       uint64_t dst_addr, uint64_t size);
 };
 
+int amdgpu_lsdma_copy_mem(struct amdgpu_device *adev, uint64_t src_addr,
+                         uint64_t dst_addr, uint64_t mem_size);
+
 #endif
index b611ade..0d2bdd0 100644 (file)
 #include "lsdma/lsdma_6_0_0_offset.h"
 #include "lsdma/lsdma_6_0_0_sh_mask.h"
 
+static int lsdma_v6_0_copy_mem(struct amdgpu_device *adev,
+                              uint64_t src_addr,
+                              uint64_t dst_addr,
+                              uint64_t size)
+{
+       uint32_t usec_timeout = 5000;  /* wait for 5ms */
+       uint32_t tmp, expect_val;
+       int i;
+
+       WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_LO, lower_32_bits(src_addr));
+       WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_HI, upper_32_bits(src_addr));
+
+       WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_LO, lower_32_bits(dst_addr));
+       WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_HI, upper_32_bits(dst_addr));
+
+       WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONTROL, 0x0);
+
+       tmp = RREG32_SOC15(LSDMA, 0, regLSDMA_PIO_COMMAND);
+       tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size);
+       tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0);
+       tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0);
+       tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0);
+       tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_ADDR_INC, 0);
+       tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, OVERLAP_DISABLE, 0);
+       tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, CONSTANT_FILL, 0);
+       WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_COMMAND, tmp);
+
+       expect_val = LSDMA_PIO_STATUS__PIO_IDLE_MASK | LSDMA_PIO_STATUS__PIO_FIFO_EMPTY_MASK;
+       for (i = 0; i < usec_timeout; i++) {
+               tmp = RREG32_SOC15(LSDMA, 0, regLSDMA_PIO_STATUS);
+               if ((tmp & expect_val) == expect_val)
+                       break;
+               udelay(1);
+       }
+
+       if (i >= usec_timeout) {
+               dev_err(adev->dev, "LSDMA PIO failed to copy memory!\n");
+               return -ETIMEDOUT;
+       }
+
+       return 0;
+}
+
 const struct amdgpu_lsdma_funcs lsdma_v6_0_funcs = {
+       .copy_mem = lsdma_v6_0_copy_mem
 };