uint32_t link_dma_ch;
} __packed;
+/* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
+struct sof_ipc_dai_alh_params {
+ struct sof_ipc_hdr hdr;
+ uint32_t stream_id;
+
+ /* reserved for future use */
+ uint32_t reserved[15];
+} __packed;
+
/* DMIC Configuration Request - SOF_IPC_DAI_DMIC_CONFIG */
/* This struct is defined per 2ch PDM controller available in the platform.
struct sof_ipc_dai_dmic_pdm_ctrl pdm[0];
} __packed;
-/* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
-struct sof_ipc_dai_alh_params {
- struct sof_ipc_hdr hdr;
- uint32_t stream_id;
-
- /* reserved for future use */
- uint32_t reserved[15];
-} __packed;
-
#endif