Merge tag 'drm-msm-next-2022-05-09' of https://gitlab.freedesktop.org/drm/msm into...
authorDave Airlie <airlied@redhat.com>
Wed, 11 May 2022 02:40:47 +0000 (12:40 +1000)
committerDave Airlie <airlied@redhat.com>
Wed, 11 May 2022 02:40:47 +0000 (12:40 +1000)
- Fourcc modifier for tiled but not compressed layouts
- Support for userspace allocated IOVA (GPU virtual address)
- Devfreq clamp_to_idle fix
- DPU: DSC (Display Stream Compression) support
- DPU: inline rotation support on SC7280
- DPU: update DP timings to follow vendor recommendations
- DP, DPU: add support for wide bus (on newer chipsets)
- DP: eDP support
- Merge DPU1 and MDP5 MDSS driver, make dpu/mdp device the master
  component
- MDSS: optionally reset the IP block at the bootup to drop
  bootloader state
- Properly register and unregister internal bridges in the DRM framework
- Complete DPU IRQ cleanup
- DP: conversion to use drm_bridge and drm_bridge_connector
- eDP: drop old eDP parts again
- DPU: writeback support
- Misc small fixes

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvJCr_1D8d0dgmyQC5HD4gmXeZw=bFV_CNCfceZbpMxRw@mail.gmail.com
19 files changed:
1  2 
Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
MAINTAINERS
drivers/gpu/drm/msm/Kconfig
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
drivers/gpu/drm/msm/dp/dp_audio.c
drivers/gpu/drm/msm/dp/dp_aux.h
drivers/gpu/drm/msm/dp/dp_catalog.c
drivers/gpu/drm/msm/dp/dp_ctrl.c
drivers/gpu/drm/msm/dp/dp_display.c
drivers/gpu/drm/msm/dp/dp_panel.c
drivers/gpu/drm/msm/dp/dp_panel.h
drivers/gpu/drm/msm/dsi/dsi_manager.c
drivers/gpu/drm/msm/msm_drv.h
drivers/gpu/drm/msm/msm_gem.c
drivers/gpu/drm/msm/msm_gem_submit.c
drivers/gpu/drm/vc4/vc4_txp.c
include/uapi/drm/drm_fourcc.h

diff --cc MAINTAINERS
Simple merge
@@@ -12,8 -12,8 +12,9 @@@ config DRM_MS
        select IOMMU_IO_PGTABLE
        select QCOM_MDT_LOADER if ARCH_QCOM
        select REGULATOR
 -      select DRM_DP_HELPER
+       select DRM_DP_AUX_BUS
 +      select DRM_DISPLAY_DP_HELPER
 +      select DRM_DISPLAY_HELPER
        select DRM_KMS_HELPER
        select DRM_PANEL
        select DRM_BRIDGE
Simple merge
index 0000000,164e5f5..b39ee4e
mode 000000,100644..100644
--- /dev/null
@@@ -1,0 -1,80 +1,80 @@@
 -#include <drm/drm_dsc.h>
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ /* Copyright (c) 2020-2022, Linaro Limited */
+ #ifndef _DPU_HW_DSC_H
+ #define _DPU_HW_DSC_H
++#include <drm/display/drm_dsc.h>
+ #define DSC_MODE_SPLIT_PANEL            BIT(0)
+ #define DSC_MODE_MULTIPLEX              BIT(1)
+ #define DSC_MODE_VIDEO                  BIT(2)
+ struct dpu_hw_dsc;
+ /**
+  * struct dpu_hw_dsc_ops - interface to the dsc hardware driver functions
+  * Assumption is these functions will be called after clocks are enabled
+  */
+ struct dpu_hw_dsc_ops {
+       /**
+        * dsc_disable - disable dsc
+        * @hw_dsc: Pointer to dsc context
+        */
+       void (*dsc_disable)(struct dpu_hw_dsc *hw_dsc);
+       /**
+        * dsc_config - configures dsc encoder
+        * @hw_dsc: Pointer to dsc context
+        * @dsc: panel dsc parameters
+        * @mode: dsc topology mode to be set
+        * @initial_lines: amount of initial lines to be used
+        */
+       void (*dsc_config)(struct dpu_hw_dsc *hw_dsc,
+                          struct msm_display_dsc_config *dsc,
+                          u32 mode,
+                          u32 initial_lines);
+       /**
+        * dsc_config_thresh - programs panel thresholds
+        * @hw_dsc: Pointer to dsc context
+        * @dsc: panel dsc parameters
+        */
+       void (*dsc_config_thresh)(struct dpu_hw_dsc *hw_dsc,
+                                 struct msm_display_dsc_config *dsc);
+ };
+ struct dpu_hw_dsc {
+       struct dpu_hw_blk base;
+       struct dpu_hw_blk_reg_map hw;
+       /* dsc */
+       enum dpu_dsc idx;
+       const struct dpu_dsc_cfg *caps;
+       /* ops */
+       struct dpu_hw_dsc_ops ops;
+ };
+ /**
+  * dpu_hw_dsc_init - initializes the dsc block for the passed dsc idx.
+  * @idx:  DSC index for which driver object is required
+  * @addr: Mapped register io address of MDP
+  * @m:    Pointer to mdss catalog data
+  * Returns: Error code or allocated dpu_hw_dsc context
+  */
+ struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, void __iomem *addr,
+                                  struct dpu_mdss_cfg *m);
+ /**
+  * dpu_hw_dsc_destroy - destroys dsc driver context
+  * @dsc:   Pointer to dsc driver context returned by dpu_hw_dsc_init
+  */
+ void dpu_hw_dsc_destroy(struct dpu_hw_dsc *dsc);
+ static inline struct dpu_hw_dsc *to_dpu_hw_dsc(struct dpu_hw_blk *hw)
+ {
+       return container_of(hw, struct dpu_hw_dsc, base);
+ }
+ #endif /* _DPU_HW_DSC_H */
Simple merge
Simple merge
Simple merge
Simple merge
@@@ -10,7 -10,7 +10,7 @@@
  #include <linux/component.h>
  #include <linux/of_irq.h>
  #include <linux/delay.h>
- #include <drm/drm_panel.h>
 -#include <drm/dp/drm_dp_aux_bus.h>
++#include <drm/display/drm_dp_aux_bus.h>
  
  #include "msm_drv.h"
  #include "msm_kms.h"
Simple merge
Simple merge
Simple merge
@@@ -30,6 -30,7 +30,7 @@@
  #include <drm/drm_plane_helper.h>
  #include <drm/drm_probe_helper.h>
  #include <drm/drm_fb_helper.h>
 -#include <drm/drm_dsc.h>
++#include <drm/display/drm_dsc.h>
  #include <drm/msm_drm.h>
  #include <drm/drm_gem.h>
  
Simple merge
Simple merge
Simple merge
Simple merge