drm/msm/dpu: fix CDP setup to account for multirect index

Client driven prefetch (CDP) is properly setup only for SSPP REC0
currently. Enable client driven prefetch also for SSPP REC1.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Link: https://lore.kernel.org/r/20211201225140.2481577-5-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 7235605..75aa478 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -75,6 +75,7 @@
 #define SSPP_TRAFFIC_SHAPER                0x130
 #define SSPP_CDP_CNTL                      0x134
 #define SSPP_UBWC_ERROR_STATUS             0x138
+#define SSPP_CDP_CNTL_REC1                 0x13c
 #define SSPP_TRAFFIC_SHAPER_PREFILL        0x150
 #define SSPP_TRAFFIC_SHAPER_REC1_PREFILL   0x154
 #define SSPP_TRAFFIC_SHAPER_REC1           0x158
@@ -624,10 +625,12 @@ static void dpu_hw_sspp_setup_qos_ctrl(struct dpu_hw_pipe *ctx,
 }
 
 static void dpu_hw_sspp_setup_cdp(struct dpu_hw_pipe *ctx,
-               struct dpu_hw_pipe_cdp_cfg *cfg)
+               struct dpu_hw_pipe_cdp_cfg *cfg,
+               enum dpu_sspp_multirect_index index)
 {
        u32 idx;
        u32 cdp_cntl = 0;
+       u32 cdp_cntl_offset = 0;
 
        if (!ctx || !cfg)
                return;
@@ -635,6 +638,11 @@ static void dpu_hw_sspp_setup_cdp(struct dpu_hw_pipe *ctx,
        if (_sspp_subblk_offset(ctx, DPU_SSPP_SRC, &idx))
                return;
 
+       if (index == DPU_SSPP_RECT_SOLO || index == DPU_SSPP_RECT_0)
+               cdp_cntl_offset = SSPP_CDP_CNTL;
+       else
+               cdp_cntl_offset = SSPP_CDP_CNTL_REC1;
+
        if (cfg->enable)
                cdp_cntl |= BIT(0);
        if (cfg->ubwc_meta_enable)
@@ -644,7 +652,7 @@ static void dpu_hw_sspp_setup_cdp(struct dpu_hw_pipe *ctx,
        if (cfg->preload_ahead == DPU_SSPP_CDP_PRELOAD_AHEAD_64)
                cdp_cntl |= BIT(3);
 
-       DPU_REG_WRITE(&ctx->hw, SSPP_CDP_CNTL, cdp_cntl);
+       DPU_REG_WRITE(&ctx->hw, cdp_cntl_offset, cdp_cntl);
 }
 
 static void _setup_layer_ops(struct dpu_hw_pipe *c,

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
index 3c53bd0..227b09f 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
@@ -356,9 +356,11 @@ struct dpu_hw_sspp_ops {
         * setup_cdp - setup client driven prefetch
         * @ctx: Pointer to pipe context
         * @cfg: Pointer to cdp configuration
+        * @index: rectangle index in multirect
         */
        void (*setup_cdp)(struct dpu_hw_pipe *ctx,
-                       struct dpu_hw_pipe_cdp_cfg *cfg);
+                       struct dpu_hw_pipe_cdp_cfg *cfg,
+                       enum dpu_sspp_multirect_index index);
 };
 
 /**

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index 3d8cafd..e81043d 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -1191,7 +1191,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
                                        DPU_FORMAT_IS_TILE(fmt);
                        cdp_cfg.preload_ahead = DPU_SSPP_CDP_PRELOAD_AHEAD_64;
 
-                       pdpu->pipe_hw->ops.setup_cdp(pdpu->pipe_hw, &cdp_cfg);
+                       pdpu->pipe_hw->ops.setup_cdp(pdpu->pipe_hw, &cdp_cfg, pstate->multirect_index);
                }
        }