wifi: rtw89: update ps_state register for chips with different generation

The ps_state register is used for driver to check if the WiFi chip leave
power save mode successfully. The register is changed for new generation,
so update it.

Signed-off-by: Chin-Yen Lee <timlee@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240126063356.17857-7-pkshih@realtek.com

diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c
index 96a9877..dbf2d6f 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/mac.c
+++ b/drivers/net/wireless/realtek/rtw89/mac.c
@@ -6184,6 +6184,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
        .rx_fltr = R_AX_RX_FLTR_OPT,
        .port_base = &rtw89_port_base_ax,
        .agg_len_ht = R_AX_AGG_LEN_HT_0,
+       .ps_status = R_AX_PPWRBIT_SETTING,
 
        .muedca_ctrl = {
                .addr = R_AX_MUEDCA_EN,

diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h
index 8968892..b3fe4ca 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/mac.h
+++ b/drivers/net/wireless/realtek/rtw89/mac.h
@@ -894,6 +894,7 @@ struct rtw89_mac_gen_def {
        u32 rx_fltr;
        const struct rtw89_port_reg *port_base;
        u32 agg_len_ht;
+       u32 ps_status;
 
        struct rtw89_reg_def muedca_ctrl;
        struct rtw89_reg_def bfee_ctrl;

diff --git a/drivers/net/wireless/realtek/rtw89/mac_be.c b/drivers/net/wireless/realtek/rtw89/mac_be.c
index 7369514..13e6fa7 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/mac_be.c
+++ b/drivers/net/wireless/realtek/rtw89/mac_be.c
@@ -2313,6 +2313,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
        .rx_fltr = R_BE_RX_FLTR_OPT,
        .port_base = &rtw89_port_base_be,
        .agg_len_ht = R_BE_AGG_LEN_HT_0,
+       .ps_status = R_BE_WMTX_POWER_BE_BIT_CTL,
 
        .muedca_ctrl = {
                .addr = R_BE_MUEDCA_EN,

diff --git a/drivers/net/wireless/realtek/rtw89/ps.c b/drivers/net/wireless/realtek/rtw89/ps.c
index be1dcd9..31290d8 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/ps.c
+++ b/drivers/net/wireless/realtek/rtw89/ps.c
@@ -14,6 +14,7 @@
 
 static int rtw89_fw_leave_lps_check(struct rtw89_dev *rtwdev, u8 macid)
 {
+       const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
        u32 pwr_en_bit = 0xE;
        u32 chk_msk = pwr_en_bit << (4 * macid);
        u32 polling;
@@ -21,7 +22,7 @@ static int rtw89_fw_leave_lps_check(struct rtw89_dev *rtwdev, u8 macid)
 
        ret = read_poll_timeout_atomic(rtw89_read32_mask, polling, !polling,
                                       1000, 50000, false, rtwdev,
-                                      R_AX_PPWRBIT_SETTING, chk_msk);
+                                      mac->ps_status, chk_msk);
        if (ret) {
                rtw89_info(rtwdev, "rtw89: failed to leave lps state\n");
                return -EBUSY;

diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index addf11f..bd7bdd2 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -6794,6 +6794,9 @@
 #define B_BE_UPD_HGQMD BIT(1)
 #define B_BE_UPD_TIMIE BIT(0)
 
+#define R_BE_WMTX_POWER_BE_BIT_CTL 0x10E0C
+#define R_BE_WMTX_POWER_BE_BIT_CTL_C1 0x14E0C
+
 #define R_BE_WMTX_TCR_BE_4 0x10E2C
 #define R_BE_WMTX_TCR_BE_4_C1 0x14E2C
 #define B_BE_UL_EHT_MUMIMO_LTF_MODE BIT(30)