dt-bindings: cache: qcom,llcc: Add SA8775p description
authorTengfei Fan <quic_tengfan@quicinc.com>
Wed, 29 May 2024 10:15:32 +0000 (18:15 +0800)
committerBjorn Andersson <andersson@kernel.org>
Thu, 30 May 2024 01:51:35 +0000 (20:51 -0500)
Add the cache controller compatible and register region descriptions for
SA8775p platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240529101534.3166507-2-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Documentation/devicetree/bindings/cache/qcom,llcc.yaml

index 07ccbda..37eada5 100644 (file)
@@ -21,6 +21,7 @@ properties:
   compatible:
     enum:
       - qcom,qdu1000-llcc
+      - qcom,sa8775p-llcc
       - qcom,sc7180-llcc
       - qcom,sc7280-llcc
       - qcom,sc8180x-llcc
@@ -80,6 +81,33 @@ allOf:
             - const: llcc0_base
             - const: llcc_broadcast_base
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,sa8775p-llcc
+    then:
+      properties:
+        reg:
+          items:
+            - description: LLCC0 base register region
+            - description: LLCC1 base register region
+            - description: LLCC2 base register region
+            - description: LLCC3 base register region
+            - description: LLCC4 base register region
+            - description: LLCC5 base register region
+            - description: LLCC broadcast base register region
+        reg-names:
+          items:
+            - const: llcc0_base
+            - const: llcc1_base
+            - const: llcc2_base
+            - const: llcc3_base
+            - const: llcc4_base
+            - const: llcc5_base
+            - const: llcc_broadcast_base
+
   - if:
       properties:
         compatible: