selftests/powerpc: Fix build errors in powerpc ptrace selftests
authorSimon Guo <wei.guo.simon@gmail.com>
Fri, 1 Sep 2017 02:17:14 +0000 (10:17 +0800)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 11 Dec 2017 02:03:37 +0000 (13:03 +1100)
GCC 7 will take "r2" in clobber list as an error and it will get
following build errors for powerpc ptrace selftests even with -fno-pic
option:
  ptrace-tm-vsx.c: In function ‘tm_vsx’:
  ptrace-tm-vsx.c:42:2: error: PIC register clobbered by ‘r2’ in ‘asm’
    asm __volatile__(
    ^~~
  make[1]: *** [ptrace-tm-vsx] Error 1
  ptrace-tm-spd-vsx.c: In function ‘tm_spd_vsx’:
  ptrace-tm-spd-vsx.c:55:2: error: PIC register clobbered by ‘r2’ in ‘asm’
    asm __volatile__(
    ^~~
  make[1]: *** [ptrace-tm-spd-vsx] Error 1
  ptrace-tm-spr.c: In function ‘tm_spr’:
  ptrace-tm-spr.c:46:2: error: PIC register clobbered by ‘r2’ in ‘asm’
    asm __volatile__(
    ^~~

Fix the build error by removing "r2" from the clobber list. None of
these asm blocks actually clobber r2.

Reported-by: Seth Forshee <seth.forshee@canonical.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Tested-by: Seth Forshee <seth.forshee@canonical.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c

index 0df3c23..277dade 100644 (file)
@@ -79,8 +79,8 @@ trans:
                : [res] "=r" (result), [texasr] "=r" (texasr)
                : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
                [sprn_texasr] "i"  (SPRN_TEXASR)
-               : "memory", "r0", "r1", "r2", "r3", "r4",
-               "r8", "r9", "r10", "r11"
+               : "memory", "r0", "r1", "r3", "r4",
+               "r7", "r8", "r9", "r10", "r11"
                );
 
        if (result) {
index 94e57cb..51427a2 100644 (file)
@@ -76,8 +76,7 @@ trans:
                : [tfhar] "=r" (tfhar), [res] "=r" (result),
                [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
                : [sprn_texasr] "i"  (SPRN_TEXASR)
-               : "memory", "r0", "r1", "r2", "r3", "r4",
-               "r8", "r9", "r10", "r11", "r31"
+               : "memory", "r0", "r8", "r31"
                );
 
        /* There are 2 32bit instructions before tbegin. */
index b4081e2..17c23ca 100644 (file)
@@ -67,7 +67,7 @@ trans:
                : [res] "=r" (result), [texasr] "=r" (texasr)
                : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
                [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" (&cptr[1])
-               : "memory", "r0", "r1", "r2", "r3", "r4",
+               : "memory", "r0", "r1", "r3", "r4",
                "r7", "r8", "r9", "r10", "r11"
                );