drm/i915/display: remove intel_wait_for_vblank()
authorJani Nikula <jani.nikula@intel.com>
Wed, 1 Dec 2021 13:57:06 +0000 (15:57 +0200)
committerJani Nikula <jani.nikula@intel.com>
Thu, 2 Dec 2021 11:45:29 +0000 (13:45 +0200)
There are only three call sites remaining for
intel_wait_for_vblank(). Remove the function, and open code it to avoid
new users from showing up.

v2:
- Use intel_crtc_wait_for_next_vblank() (Ville)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/aabcda1208072a732d7796e6dacce37dca9bb843.1638366969.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_cdclk.c
drivers/gpu/drm/i915/display/intel_crt.c
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_display_types.h

index 5a475aa..986fb9b 100644 (file)
@@ -1690,7 +1690,7 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
        intel_de_write(dev_priv, CDCLK_CTL, val);
 
        if (pipe != INVALID_PIPE)
-               intel_wait_for_vblank(dev_priv, pipe);
+               intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
 
        if (DISPLAY_VER(dev_priv) >= 11) {
                ret = sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
index 42533e6..6a3893c 100644 (file)
@@ -721,7 +721,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
                intel_uncore_posting_read(uncore, pipeconf_reg);
                /* Wait for next Vblank to substitue
                 * border color for Color info */
-               intel_wait_for_vblank(dev_priv, pipe);
+               intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
                st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
                status = ((st00 & (1 << 4)) != 0) ?
                        connector_status_connected :
index 5d7b9a9..17a261a 100644 (file)
@@ -2101,8 +2101,12 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
         * to change the workaround. */
        hsw_workaround_pipe = new_crtc_state->hsw_workaround_pipe;
        if (IS_HASWELL(dev_priv) && hsw_workaround_pipe != INVALID_PIPE) {
-               intel_wait_for_vblank(dev_priv, hsw_workaround_pipe);
-               intel_wait_for_vblank(dev_priv, hsw_workaround_pipe);
+               struct intel_crtc *wa_crtc;
+
+               wa_crtc = intel_crtc_for_pipe(dev_priv, hsw_workaround_pipe);
+
+               intel_crtc_wait_for_next_vblank(wa_crtc);
+               intel_crtc_wait_for_next_vblank(wa_crtc);
        }
 }
 
index 036f9be..a48dfd1 100644 (file)
@@ -2025,14 +2025,6 @@ intel_crtc_wait_for_next_vblank(struct intel_crtc *crtc)
        drm_crtc_wait_one_vblank(&crtc->base);
 }
 
-static inline void
-intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
-{
-       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
-
-       intel_crtc_wait_for_next_vblank(crtc);
-}
-
 static inline void
 intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe pipe)
 {