Merge tag 'amlogic-fixes' into v5.9/dt64
authorKevin Hilman <khilman@baylibre.com>
Tue, 21 Jul 2020 21:12:19 +0000 (14:12 -0700)
committerKevin Hilman <khilman@baylibre.com>
Tue, 21 Jul 2020 21:12:19 +0000 (14:12 -0700)
Amlogic fixes for v5.8-rc
- misc DT fixes, and SoC ID fixes

arch/arm/boot/dts/meson.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
drivers/soc/amlogic/meson-gx-socinfo.c

index ae89dea..91129dc 100644 (file)
@@ -11,7 +11,7 @@
        #size-cells = <1>;
        interrupt-parent = <&gic>;
 
-       L2: l2-cache-controller@c4200000 {
+       L2: cache-controller@c4200000 {
                compatible = "arm,pl310-cache";
                reg = <0xc4200000 0x1000>;
                cache-unified;
index 6a226fa..9e43f4d 100644 (file)
@@ -10,7 +10,7 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/sound/meson-aiu.h>
 
-#include "meson-gxl-s905x.dtsi"
+#include "meson-gxl-s805x.dtsi"
 
 / {
        compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
index 867e30f..eb7f5a3 100644 (file)
@@ -9,7 +9,7 @@
 
 #include <dt-bindings/input/input.h>
 
-#include "meson-gxl-s905x.dtsi"
+#include "meson-gxl-s805x.dtsi"
 
 / {
        compatible = "amlogic,p241", "amlogic,s805x", "amlogic,meson-gxl";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi
new file mode 100644 (file)
index 0000000..f9d7056
--- /dev/null
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 BayLibre SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-gxl-s905x.dtsi"
+
+/ {
+       compatible = "amlogic,s805x", "amlogic,meson-gxl";
+};
+
+/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */
+&mali {
+       assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
+                         <&clkc CLKID_MALI_0>,
+                         <&clkc CLKID_MALI>; /* Glitch free mux */
+       assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
+                                <0>, /* Do Nothing */
+                                <&clkc CLKID_MALI_0>;
+       assigned-clock-rates = <0>, /* Do Nothing */
+                              <666666666>,
+                              <0>; /* Do Nothing */
+};
index beb5fc7..c3ac531 100644 (file)
        };
 };
 
+&hwrng {
+       clocks = <&clkc CLKID_RNG0>;
+       clock-names = "core";
+};
+
 &i2c_A {
        clocks = <&clkc CLKID_I2C>;
 };
index 01fc0d2..6f54bd8 100644 (file)
@@ -66,10 +66,12 @@ static const struct meson_gx_package_id {
        { "A113D", 0x25, 0x22, 0xff },
        { "S905D2", 0x28, 0x10, 0xf0 },
        { "S905X2", 0x28, 0x40, 0xf0 },
-       { "S922X", 0x29, 0x40, 0xf0 },
        { "A311D", 0x29, 0x10, 0xf0 },
-       { "S905X3", 0x2b, 0x5, 0xf },
-       { "S905D3", 0x2b, 0xb0, 0xf0 },
+       { "S922X", 0x29, 0x40, 0xf0 },
+       { "S905D3", 0x2b, 0x4, 0xf5 },
+       { "S905X3", 0x2b, 0x5, 0xf5 },
+       { "S905X3", 0x2b, 0x10, 0x3f },
+       { "S905D3", 0x2b, 0x30, 0x3f },
        { "A113L", 0x2c, 0x0, 0xf8 },
 };