drm/i915: Just check the vebox IIR regardless

As we don't unmask and enable the vebox interrupts if the engine is not
being used, we will never generate the vebox interrupts as part of the
IIR and so can unconditionally check IIR without fear of chasing into
the vebox.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190305150914.11340-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a42eb63..06541f4 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1801,13 +1801,11 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
        if (INTEL_GEN(dev_priv) >= 8)
                return;
 
-       if (HAS_VEBOX(dev_priv)) {
-               if (pm_iir & PM_VEBOX_USER_INTERRUPT)
-                       intel_engine_breadcrumbs_irq(dev_priv->engine[VECS]);
+       if (pm_iir & PM_VEBOX_USER_INTERRUPT)
+               intel_engine_breadcrumbs_irq(dev_priv->engine[VECS]);
 
-               if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
-                       DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
-       }
+       if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
+               DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
 }
 
 static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir)