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dmaengine: at_hdmac: Fix at_lli struct definition
author
Tudor Ambarus
<tudor.ambarus@microchip.com>
Tue, 25 Oct 2022 09:02:35 +0000
(12:02 +0300)
committer
Vinod Koul
<vkoul@kernel.org>
Tue, 8 Nov 2022 05:13:56 +0000
(10:43 +0530)
Those hardware registers are all of 32 bits, while dma_addr_t ca be of
type u64 or u32 depending on CONFIG_ARCH_DMA_ADDR_T_64BIT. Force u32 to
comply with what the hardware expects.
Fixes:
dc78baa2b90b
("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: stable@vger.kernel.org
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link:
https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com
Link:
https://lore.kernel.org/r/20221025090306.297886-2-tudor.ambarus@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/at_hdmac_regs.h
patch
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diff --git
a/drivers/dma/at_hdmac_regs.h
b/drivers/dma/at_hdmac_regs.h
index
4d1ebc0
..
d4d382d
100644
(file)
--- a/
drivers/dma/at_hdmac_regs.h
+++ b/
drivers/dma/at_hdmac_regs.h
@@
-186,13
+186,13
@@
/* LLI == Linked List Item; aka DMA buffer descriptor */
struct at_lli {
/* values that are not changed by hardware */
-
dma_addr_t
saddr;
-
dma_addr_t
daddr;
+
u32
saddr;
+
u32
daddr;
/* value that may get written back: */
- u32
ctrla;
+ u32 ctrla;
/* more values that are not changed by hardware */
- u32
ctrlb;
-
dma_addr_t dscr;
/* chain to next lli */
+ u32 ctrlb;
+
u32 dscr;
/* chain to next lli */
};
/**