drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flag
authorJude Shih <shenshih@amd.com>
Thu, 1 Apr 2021 03:10:41 +0000 (11:10 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Apr 2021 20:54:42 +0000 (16:54 -0400)
[Why & How]
We use outbox interrupt that allows us to do the AUX via DMUB
Therefore, we need to add some irq source related definition
in the header files;

Signed-off-by: Jude Shih <shenshih@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h

index ce13b2c..dc3a692 100644 (file)
@@ -922,6 +922,7 @@ struct amdgpu_device {
        struct amdgpu_irq_src           pageflip_irq;
        struct amdgpu_irq_src           hpd_irq;
        struct amdgpu_irq_src           dmub_trace_irq;
+       struct amdgpu_irq_src           dmub_outbox_irq;
 
        /* rings */
        u64                             fence_context;
index e2bffca..754170a 100644 (file)
 
 #define DCN_1_0__SRCID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT       0x68
 #define DCN_1_0__CTXID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT       6
+#define DCN_1_0__SRCID__DMCUB_OUTBOX_LOW_PRIORITY_READY_INT        0x68 // DMCUB_IHC_outbox1_ready_int IHC_DMCUB_outbox1_ready_int_ack DMCUB_OUTBOX_LOW_PRIORITY_READY_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE24 Level/Pulse
+#define DCN_1_0__CTXID__DMCUB_OUTBOX_LOW_PRIORITY_READY_INT        8
 
 #endif // __IRQSRCS_DCN_1_0_H__