Merge branches 'clk-basic', 'clk-mtk', 'clk-devm-enable' and 'clk-ti-dt' into clk...

 - Remove allwinner workaround logic/compatible in fixed factor code
 - MediaTek clk driver cleanups
 - Add reset support to more MediaTek clk drivers
 - devm helpers for clk_get() + clk_prepare() and clk_enable()

* clk-basic:
  clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
  clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
  clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
  dt-bindings: clock: fixed-factor: Drop Allwinner A10 compatible
  clk: fixed: Remove Allwinner A10 special-case logic

* clk-mtk:
  clk: mediatek: reset: Add infra_ao reset support for MT8186
  dt-bindings: arm: mediatek: Add #reset-cells property for MT8186
  dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186
  clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195
  dt-bindings: reset: mediatek: Add infra_ao reset index for MT8192/MT8195
  dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195
  clk: mediatek: reset: Add reset support for simple probe
  clk: mediatek: reset: Add new register reset function with device
  clk: mediatek: reset: Change return type for clock reset register function
  clk: mediatek: reset: Support inuput argument index mode
  clk: mediatek: reset: Support nonsequence base offsets of reset registers
  clk: mediatek: reset: Revise structure to control reset register
  clk: mediatek: reset: Merge and revise reset register function
  clk: mediatek: reset: Extract common drivers to update function
  clk: mediatek: reset: Refine and reorder functions in reset.c
  clk: mediatek: reset: Fix written reset bit offset
  clk: mediatek: reset: Add reset.h
  clk: mediatek: Delete MT8192 msdc gate
  dt-bindings: ARM: Mediatek: Remove msdc binding of MT8192 clock

* clk-devm-enable:
  clk: Remove never used devm_clk_*unregister()
  clk: Fix pointer casting to prevent oops in devm_clk_release()
  clk: meson: axg-audio: Don't duplicate devm_clk_get_enabled()
  clk: Provide new devm_clk helpers for prepared and enabled clocks
  clk: generalize devm_clk_get() a bit
  clk: Improve documentation for devm_clk_get() and its optional variant

* clk-ti-dt:
  clk: ti: Stop using legacy clkctrl names for omap4 and 5

diff --combined include/linux/clk-provider.h
index c10dc4c,94458cb,c10dc4c,72d937c,c10dc4c..1615010
--- 1/include/linux/clk-provider.h
--- 2/include/linux/clk-provider.h
--- 3/include/linux/clk-provider.h
--- 4/include/linux/clk-provider.h
--- 5/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@@@@@ -831,6 -831,25 -831,6 -831,6 -831,6 +831,25 @@@@@@ struct clk *clk_register_divider_table(
        __devm_clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL,   \
                                  NULL, (flags), (reg), (shift), (width),     \
                                  (clk_divider_flags), NULL, (lock))
+ +++/**
+ +++ * devm_clk_hw_register_divider_parent_hw - register a divider clock with the clock framework
+ +++ * @dev: device registering this clock
+ +++ * @name: name of this clock
+ +++ * @parent_hw: pointer to parent clk
+ +++ * @flags: framework-specific flags
+ +++ * @reg: register address to adjust divider
+ +++ * @shift: number of bits to shift the bitfield
+ +++ * @width: width of the bitfield
+ +++ * @clk_divider_flags: divider-specific flags for this clock
+ +++ * @lock: shared register lock for this clock
+ +++ */
+ +++#define devm_clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags,   \
+ +++                                          reg, shift, width,             \
+ +++                                          clk_divider_flags, lock)       \
+ +++   __devm_clk_hw_register_divider((dev), NULL, (name), NULL,             \
+ +++                                  (parent_hw), NULL, (flags), (reg),     \
+ +++                                  (shift), (width), (clk_divider_flags), \
+ +++                                  NULL, (lock))
     /**
      * devm_clk_hw_register_divider_table - register a table based divider clock
      * with the clock framework (devres variant)
@@@@@@ -961,6 -980,13 -961,6 -961,6 -961,6 +980,13 @@@@@@ struct clk *clk_register_mux_table(stru
                              (parent_names), NULL, NULL, (flags), (reg),     \
                              (shift), BIT((width)) - 1, (clk_mux_flags),     \
                              NULL, (lock))
+ +++#define devm_clk_hw_register_mux_parent_hws(dev, name, parent_hws,       \
+ +++                                       num_parents, flags, reg, shift,   \
+ +++                                       width, clk_mux_flags, lock)       \
+ +++   __devm_clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL,  \
+ +++                              (parent_hws), NULL, (flags), (reg),        \
+ +++                              (shift), BIT((width)) - 1,                 \
+ +++                              (clk_mux_flags), NULL, (lock))
     
     int clk_mux_val_to_index(struct clk_hw *hw, const u32 *table, unsigned int flags,
                         unsigned int val);
@@@@@@ -1006,6 -1032,14 -1006,6 -1006,6 -1006,6 +1032,14 @@@@@@ struct clk_hw *devm_clk_hw_register_fix
     struct clk_hw *devm_clk_hw_register_fixed_factor_index(struct device *dev,
                const char *name, unsigned int index, unsigned long flags,
                unsigned int mult, unsigned int div);
+ +++
+ +++struct clk_hw *devm_clk_hw_register_fixed_factor_parent_hw(struct device *dev,
+ +++           const char *name, const struct clk_hw *parent_hw,
+ +++           unsigned long flags, unsigned int mult, unsigned int div);
+ +++
+ +++struct clk_hw *clk_hw_register_fixed_factor_parent_hw(struct device *dev,
+ +++           const char *name, const struct clk_hw *parent_hw,
+ +++           unsigned long flags, unsigned int mult, unsigned int div);
     /**
      * struct clk_fractional_divider - adjustable fractional divider clock
      *
@@@@@@ -1176,10 -1210,10 -1176,10 -1176,8 -1176,10 +1210,8 @@@@@@ int __must_check devm_clk_hw_register(s
     int __must_check of_clk_hw_register(struct device_node *node, struct clk_hw *hw);
     
     void clk_unregister(struct clk *clk);
--- -void devm_clk_unregister(struct device *dev, struct clk *clk);
     
     void clk_hw_unregister(struct clk_hw *hw);
--- -void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw);
     
     /* helper functions */
     const char *__clk_get_name(const struct clk *clk);