drm/i915/gt: Clear CACHE_MODE prior to clearing residuals
authorChris Wilson <chris@chris-wilson.co.uk>
Sun, 17 Jan 2021 09:30:15 +0000 (09:30 +0000)
committerJani Nikula <jani.nikula@intel.com>
Tue, 26 Jan 2021 13:45:49 +0000 (15:45 +0200)
Since we do a bare context switch with no restore, the clear residual
kernel runs on dirty state, and we must be careful to avoid executing
with bad state from context registers inherited from a malicious client.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2955
Fixes: 09aa9e45863e ("drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail")
Testcase: igt/gem_ctx_isolation # ivb,vlv
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Reviewed-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210117093015.29143-1-chris@chris-wilson.co.uk
(cherry picked from commit ace44e13e577c2ae59980e9a6ff5ca253b1cf831)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/gt/gen7_renderclear.c

index 9446537..e961ad6 100644 (file)
@@ -390,6 +390,16 @@ static void emit_batch(struct i915_vma * const vma,
                                                     &cb_kernel_ivb,
                                                     desc_count);
 
+       /* Reset inherited context registers */
+       gen7_emit_pipeline_invalidate(&cmds);
+       batch_add(&cmds, MI_LOAD_REGISTER_IMM(2));
+       batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7));
+       batch_add(&cmds, 0xffff0000);
+       batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1));
+       batch_add(&cmds, 0xffff0000 | PIXEL_SUBSPAN_COLLECT_OPT_DISABLE);
+       gen7_emit_pipeline_flush(&cmds);
+
+       /* Switch to the media pipeline and our base address */
        gen7_emit_pipeline_invalidate(&cmds);
        batch_add(&cmds, PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
        batch_add(&cmds, MI_NOOP);
@@ -399,9 +409,11 @@ static void emit_batch(struct i915_vma * const vma,
        gen7_emit_state_base_address(&cmds, descriptors);
        gen7_emit_pipeline_invalidate(&cmds);
 
+       /* Set the clear-residual kernel state */
        gen7_emit_vfe_state(&cmds, bv, urb_size - 1, 0, 0);
        gen7_emit_interface_descriptor_load(&cmds, descriptors, desc_count);
 
+       /* Execute the kernel on all HW threads */
        for (i = 0; i < num_primitives(bv); i++)
                gen7_emit_media_object(&cmds, i);