misc: rtsx: Find L1 PM Substates capability instead of hard-coding
authorBjorn Helgaas <bhelgaas@google.com>
Tue, 21 Jul 2020 21:23:35 +0000 (16:23 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 22 Jul 2020 11:34:27 +0000 (13:34 +0200)
Instead of hard-coding the location of the L1 PM Substates capability based
on the Device ID, search for it in the extended capabilities list.  This
works for any device, as long as it implements the L1 PM Substates
capability correctly, so it doesn't require maintenance as new devices are
added.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200721212336.1159079-5-helgaas@kernel.org
[ minor addition due to differences in my tree - gregkh]
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/misc/cardreader/rts5228.c
drivers/misc/cardreader/rts5249.c
drivers/misc/cardreader/rts5260.c
drivers/misc/cardreader/rts5261.c
include/linux/rtsx_pci.h

index 4489298..f5716c6 100644 (file)
@@ -379,11 +379,16 @@ static void rts5228_process_ocp(struct rtsx_pcr *pcr)
 
 static void rts5228_init_from_cfg(struct rtsx_pcr *pcr)
 {
+       struct pci_dev *pdev = pcr->pci;
+       int l1ss;
        u32 lval;
        struct rtsx_cr_option *option = &pcr->option;
 
-       pci_read_config_dword(pcr->pci, PCR_ASPM_SETTING_REG1, &lval);
+       l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
+       if (!l1ss)
+               return;
 
+       pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
 
        if (0 == (lval & 0x0F))
                rtsx_pci_enable_oobs_polling(pcr);
index 665472d..1b8149e 100644 (file)
@@ -95,15 +95,15 @@ static void rtsx_base_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
 static void rts5249_init_from_cfg(struct rtsx_pcr *pcr)
 {
        struct pci_dev *pdev = pcr->pci;
+       int l1ss;
        struct rtsx_cr_option *option = &(pcr->option);
        u32 lval;
 
-       if (CHK_PCI_PID(pcr, PID_524A))
-               pci_read_config_dword(pdev,
-                       PCR_ASPM_SETTING_REG1, &lval);
-       else
-               pci_read_config_dword(pdev,
-                       PCR_ASPM_SETTING_REG2, &lval);
+       l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
+       if (!l1ss)
+               return;
+
+       pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
 
        if (lval & ASPM_L1_1_EN_MASK)
                rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
index 0e806dd..ebf7764 100644 (file)
@@ -498,10 +498,15 @@ static void rts5260_pwr_saving_setting(struct rtsx_pcr *pcr)
 static void rts5260_init_from_cfg(struct rtsx_pcr *pcr)
 {
        struct pci_dev *pdev = pcr->pci;
+       int l1ss;
        struct rtsx_cr_option *option = &pcr->option;
        u32 lval;
 
-       pci_read_config_dword(pdev, PCR_ASPM_SETTING_5260, &lval);
+       l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
+       if (!l1ss)
+               return;
+
+       pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
 
        if (lval & ASPM_L1_1_EN_MASK)
                rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
index 4f30637..4b6e3fe 100644 (file)
@@ -413,10 +413,15 @@ static int rts5261_init_from_hw(struct rtsx_pcr *pcr)
 static void rts5261_init_from_cfg(struct rtsx_pcr *pcr)
 {
        struct pci_dev *pdev = pcr->pci;
+       int l1ss;
        u32 lval;
        struct rtsx_cr_option *option = &pcr->option;
 
-       pci_read_config_dword(pdev, PCR_ASPM_SETTING_REG1, &lval);
+       l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
+       if (!l1ss)
+               return;
+
+       pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
 
        if (lval & ASPM_L1_1_EN_MASK)
                rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
index b93573c..f146ca4 100644 (file)
 #define   PHY_DIG1E_RX_EN_KEEP         0x0001
 #define PHY_DUM_REG                    0x1F
 
-#define PCR_ASPM_SETTING_REG1          0x160
-#define PCR_ASPM_SETTING_REG2          0x168
-#define PCR_ASPM_SETTING_5260          0x178
-
 #define PCR_SETTING_REG1               0x724
 #define PCR_SETTING_REG2               0x814
 #define PCR_SETTING_REG3               0x747