PM / devfreq: tegra: Replace write memory barrier with the read barrier
authorDmitry Osipenko <digetx@gmail.com>
Wed, 1 May 2019 23:38:02 +0000 (02:38 +0300)
committerMyungJoo Ham <myungjoo.ham@samsung.com>
Sat, 24 Aug 2019 11:11:12 +0000 (20:11 +0900)
The write memory barrier isn't needed because the BUS buffer is flushed
by read after write that happens after the removed wmb(), we will also
use readl() instead of the relaxed version to ensure that read is indeed
completed.

Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
drivers/devfreq/tegra-devfreq.c

index 9d9bfef..986f3df 100644 (file)
@@ -231,8 +231,7 @@ static void tegra_devfreq_update_wmark(struct tegra_devfreq *tegra,
 static void actmon_write_barrier(struct tegra_devfreq *tegra)
 {
        /* ensure the update has reached the ACTMON */
-       wmb();
-       actmon_readl(tegra, ACTMON_GLB_STATUS);
+       readl(tegra->regs + ACTMON_GLB_STATUS);
 }
 
 static void actmon_isr_device(struct tegra_devfreq *tegra,