arm64: dts: reneas: rcar-gen3: Add SDnH clocks

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-13-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-14-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-15-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-16-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-17-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-18-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-19-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-22-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 1768a3e..391ffe6 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -2668,7 +2668,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
@@ -2681,7 +2682,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
@@ -2694,7 +2696,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
@@ -2707,7 +2710,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index 2bd8169..b1a6cf7 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -2468,7 +2468,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
@@ -2481,7 +2482,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
@@ -2494,7 +2496,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
@@ -2507,7 +2510,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index 86d59e7..1c1da6d 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2312,7 +2312,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77961_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
@@ -2325,7 +2326,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77961_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
@@ -2338,7 +2340,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77961_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
@@ -2351,7 +2354,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77961_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 08df756..3a357d9 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -2315,7 +2315,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
@@ -2328,7 +2329,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
@@ -2341,7 +2343,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
@@ -2354,7 +2357,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index 6347d15..2a4513e 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -1339,7 +1339,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77980_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                        max-frequency = <200000000>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 0ea300a..8698058 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -1788,7 +1788,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 314>;
+                       clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
@@ -1801,7 +1802,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 313>;
+                       clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
@@ -1814,7 +1816,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 311>;
+                       clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 16ad5fc..f29f398 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -1216,7 +1216,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 312>;
+                       clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77995_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 43bf2cb..940e499 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -1993,7 +1993,8 @@
                                     "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 706>;
+                       clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>;
+                       clock-names = "core", "clkh";
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 706>;
                        max-frequency = <200000000>;