crypto: Kconfig - simplify CRC entries

Shorten menu titles and make them consistent:
- acronym
- name
- architecture features in parenthesis
- no suffixes like "<something> algorithm", "support", or
  "hardware acceleration", or "optimized"

Simplify help text descriptions, update references, and ensure that
https references are still valid.

Signed-off-by: Robert Elliott <elliott@hpe.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/arch/arm/crypto/Kconfig b/arch/arm/crypto/Kconfig
index 4b062bf..7568452 100644 (file)
--- a/arch/arm/crypto/Kconfig
+++ b/arch/arm/crypto/Kconfig
@@ -157,16 +157,29 @@ config CRYPTO_CHACHA20_NEON
        select CRYPTO_ARCH_HAVE_LIB_CHACHA
 
 config CRYPTO_CRC32_ARM_CE
-       tristate "CRC32(C) digest algorithm using CRC and/or PMULL instructions"
+       tristate "CRC32C and CRC32"
        depends on KERNEL_MODE_NEON
        depends on CRC32
        select CRYPTO_HASH
+       help
+         CRC32c CRC algorithm with the iSCSI polynomial (RFC 3385 and RFC 3720)
+         and CRC32 CRC algorithm (IEEE 802.3)
+
+         Architecture: arm using:
+         - CRC and/or PMULL instructions
+
+         Drivers: crc32-arm-ce and crc32c-arm-ce
 
 config CRYPTO_CRCT10DIF_ARM_CE
-       tristate "CRCT10DIF digest algorithm using PMULL instructions"
+       tristate "CRCT10DIF"
        depends on KERNEL_MODE_NEON
        depends on CRC_T10DIF
        select CRYPTO_HASH
+       help
+         CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)
+
+         Architecture: arm using:
+         - PMULL (Polynomial Multiply Long) instructions
 
 endmenu
 

diff --git a/arch/arm64/crypto/Kconfig b/arch/arm64/crypto/Kconfig
index c5d42f6..cfc9348 100644 (file)
--- a/arch/arm64/crypto/Kconfig
+++ b/arch/arm64/crypto/Kconfig
@@ -127,9 +127,14 @@ config CRYPTO_AES_ARM64_CE_CCM
        select CRYPTO_LIB_AES
 
 config CRYPTO_CRCT10DIF_ARM64_CE
-       tristate "CRCT10DIF digest algorithm using PMULL instructions"
+       tristate "CRCT10DIF (PMULL)"
        depends on KERNEL_MODE_NEON && CRC_T10DIF
        select CRYPTO_HASH
+       help
+         CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)
+
+         Architecture: arm64 using
+         - PMULL (Polynomial Multiply Long) instructions
 
 endmenu
 

diff --git a/arch/mips/crypto/Kconfig b/arch/mips/crypto/Kconfig
index 7c07611..8a40add 100644 (file)
--- a/arch/mips/crypto/Kconfig
+++ b/arch/mips/crypto/Kconfig
@@ -3,12 +3,13 @@
 menu "Accelerated Cryptographic Algorithms for CPU (mips)"
 
 config CRYPTO_CRC32_MIPS
-       tristate "CRC32c and CRC32 CRC algorithm (MIPS)"
+       tristate "CRC32c and CRC32"
        depends on MIPS_CRC_SUPPORT
        select CRYPTO_HASH
        help
-         CRC32c and CRC32 CRC algorithms implemented using mips crypto
-         instructions, when available.
+         CRC32c and CRC32 CRC algorithms
+
+         Architecture: mips
 
 config CRYPTO_POLY1305_MIPS
        tristate "Poly1305 authenticator algorithm (MIPS optimized)"

diff --git a/arch/powerpc/crypto/Kconfig b/arch/powerpc/crypto/Kconfig
index 74f5359..d1c34e9 100644 (file)
--- a/arch/powerpc/crypto/Kconfig
+++ b/arch/powerpc/crypto/Kconfig
@@ -3,30 +3,36 @@
 menu "Accelerated Cryptographic Algorithms for CPU (powerpc)"
 
 config CRYPTO_CRC32C_VPMSUM
-       tristate "CRC32c CRC algorithm (powerpc64)"
+       tristate "CRC32c"
        depends on PPC64 && ALTIVEC
        select CRYPTO_HASH
        select CRC32
        help
-         CRC32c algorithm implemented using vector polynomial multiply-sum
-         (vpmsum) instructions, introduced in POWER8. Enable on POWER8
-         and newer processors for improved performance.
+         CRC32c CRC algorithm with the iSCSI polynomial (RFC 3385 and RFC 3720)
+
+         Architecture: powerpc64 using
+         - AltiVec extensions
+
+         Enable on POWER8 and newer processors for improved performance.
 
 config CRYPTO_CRCT10DIF_VPMSUM
-       tristate "CRC32T10DIF powerpc64 hardware acceleration"
+       tristate "CRC32T10DIF"
        depends on PPC64 && ALTIVEC && CRC_T10DIF
        select CRYPTO_HASH
        help
-         CRC10T10DIF algorithm implemented using vector polynomial
-         multiply-sum (vpmsum) instructions, introduced in POWER8. Enable on
-         POWER8 and newer processors for improved performance.
+         CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)
+
+         Architecture: powerpc64 using
+         - AltiVec extensions
+
+         Enable on POWER8 and newer processors for improved performance.
 
 config CRYPTO_VPMSUM_TESTER
-       tristate "Powerpc64 vpmsum hardware acceleration tester"
+       tristate "CRC32c and CRC32T10DIF hardware acceleration tester"
        depends on CRYPTO_CRCT10DIF_VPMSUM && CRYPTO_CRC32C_VPMSUM
        help
-         Stress test for CRC32c and CRC-T10DIF algorithms implemented with
-         POWER8 vpmsum instructions.
+         Stress test for CRC32c and CRCT10DIF algorithms implemented with
+         powerpc64 AltiVec extensions (POWER8 vpmsum instructions).
          Unless you are testing these algorithms, you don't need this.
 
 config CRYPTO_MD5_PPC

diff --git a/arch/s390/crypto/Kconfig b/arch/s390/crypto/Kconfig
index ef0651d..5d12ecf 100644 (file)
--- a/arch/s390/crypto/Kconfig
+++ b/arch/s390/crypto/Kconfig
@@ -3,15 +3,14 @@
 menu "Accelerated Cryptographic Algorithms for CPU (s390)"
 
 config CRYPTO_CRC32_S390
-       tristate "CRC-32 algorithms"
+       tristate "CRC32c and CRC32"
        depends on S390
        select CRYPTO_HASH
        select CRC32
        help
-         Select this option if you want to use hardware accelerated
-         implementations of CRC algorithms.  With this option, you
-         can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
-         and CRC-32C (Castagnoli).
+         CRC32c and CRC32 CRC algorithms
+
+         Architecture: s390
 
          It is available with IBM z13 or later.
 

diff --git a/arch/sparc/crypto/Kconfig b/arch/sparc/crypto/Kconfig
index eaa2afc..145debe 100644 (file)
--- a/arch/sparc/crypto/Kconfig
+++ b/arch/sparc/crypto/Kconfig
@@ -13,13 +13,14 @@ config CRYPTO_DES_SPARC64
          optimized using SPARC64 crypto opcodes.
 
 config CRYPTO_CRC32C_SPARC64
-       tristate "CRC32c CRC algorithm (SPARC64)"
+       tristate "CRC32c"
        depends on SPARC64
        select CRYPTO_HASH
        select CRC32
        help
-         CRC32c CRC algorithm implemented using sparc64 crypto instructions,
-         when available.
+         CRC32c CRC algorithm with the iSCSI polynomial (RFC 3385 and RFC 3720)
+
+         Architecture: sparc64
 
 config CRYPTO_MD5_SPARC64
        tristate "MD5 digest algorithm (SPARC64)"

diff --git a/arch/x86/crypto/Kconfig b/arch/x86/crypto/Kconfig
index 76229cc..03f9a3a 100644 (file)
--- a/arch/x86/crypto/Kconfig
+++ b/arch/x86/crypto/Kconfig
@@ -467,39 +467,35 @@ config CRYPTO_GHASH_CLMUL_NI_INTEL
          GHASH, the hash function used in GCM (Galois/Counter mode).
 
 config CRYPTO_CRC32C_INTEL
-       tristate "CRC32c INTEL hardware acceleration"
+       tristate "CRC32c (SSE4.2/PCLMULQDQ)"
        depends on X86
        select CRYPTO_HASH
        help
-         In Intel processor with SSE4.2 supported, the processor will
-         support CRC32C implementation using hardware accelerated CRC32
-         instruction. This option will create 'crc32c-intel' module,
-         which will enable any routine to use the CRC32 instruction to
-         gain performance compared with software implementation.
-         Module will be crc32c-intel.
+         CRC32c CRC algorithm with the iSCSI polynomial (RFC 3385 and RFC 3720)
+
+         Architecture: x86 (32-bit and 64-bit) using:
+         - SSE4.2 (Streaming SIMD Extensions 4.2) CRC32 instruction
+         - PCLMULQDQ (carry-less multiplication)
 
 config CRYPTO_CRC32_PCLMUL
-       tristate "CRC32 PCLMULQDQ hardware acceleration"
+       tristate "CRC32 (PCLMULQDQ)"
        depends on X86
        select CRYPTO_HASH
        select CRC32
        help
-         From Intel Westmere and AMD Bulldozer processor with SSE4.2
-         and PCLMULQDQ supported, the processor will support
-         CRC32 PCLMULQDQ implementation using hardware accelerated PCLMULQDQ
-         instruction. This option will create 'crc32-pclmul' module,
-         which will enable any routine to use the CRC-32-IEEE 802.3 checksum
-         and gain better performance as compared with the table implementation.
+         CRC32 CRC algorithm (IEEE 802.3)
+
+         Architecture: x86 (32-bit and 64-bit) using:
+         - PCLMULQDQ (carry-less multiplication)
 
 config CRYPTO_CRCT10DIF_PCLMUL
-       tristate "CRCT10DIF PCLMULQDQ hardware acceleration"
+       tristate "CRCT10DIF (PCLMULQDQ)"
        depends on X86 && 64BIT && CRC_T10DIF
        select CRYPTO_HASH
        help
-         For x86_64 processors with SSE4.2 and PCLMULQDQ supported,
-         CRC T10 DIF PCLMULQDQ computation can be hardware
-         accelerated PCLMULQDQ instruction. This option will create
-         'crct10dif-pclmul' module, which is faster when computing the
-         crct10dif checksum as compared with the generic table implementation.
+         CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)
+
+         Architecture: x86_64 using:
+         - PCLMULQDQ (carry-less multiplication)
 
 endmenu

diff --git a/crypto/Kconfig b/crypto/Kconfig
index 1fda21a..6dea212 100644 (file)
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -1093,34 +1093,47 @@ endmenu
 menu "CRCs (cyclic redundancy checks)"
 
 config CRYPTO_CRC32C
-       tristate "CRC32c CRC algorithm"
+       tristate "CRC32c"
        select CRYPTO_HASH
        select CRC32
        help
-         Castagnoli, et al Cyclic Redundancy-Check Algorithm.  Used
-         by iSCSI for header and data digests and by others.
-         See Castagnoli93.  Module will be crc32c.
+         CRC32c CRC algorithm with the iSCSI polynomial (RFC 3385 and RFC 3720)
+
+         A 32-bit CRC (cyclic redundancy check) with a polynomial defined
+         by G. Castagnoli, S. Braeuer and M. Herrman in "Optimization of Cyclic
+         Redundancy-Check Codes with 24 and 32 Parity Bits", IEEE Transactions
+         on Communications, Vol. 41, No. 6, June 1993, selected for use with
+         iSCSI.
+
+         Used by btrfs, ext4, jbd2, NVMeoF/TCP, and iSCSI.
 
 config CRYPTO_CRC32
-       tristate "CRC32 CRC algorithm"
+       tristate "CRC32"
        select CRYPTO_HASH
        select CRC32
        help
-         CRC-32-IEEE 802.3 cyclic redundancy-check algorithm.
-         Shash crypto api wrappers to crc32_le function.
+         CRC32 CRC algorithm (IEEE 802.3)
+
+         Used by RoCEv2 and f2fs.
 
 config CRYPTO_CRCT10DIF
-       tristate "CRCT10DIF algorithm"
+       tristate "CRCT10DIF"
        select CRYPTO_HASH
        help
-         CRC T10 Data Integrity Field computation is being cast as
-         a crypto transform.  This allows for faster crc t10 diff
-         transforms to be used if they are available.
+         CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)
+
+         CRC algorithm used by the SCSI Block Commands standard.
 
 config CRYPTO_CRC64_ROCKSOFT
-       tristate "Rocksoft Model CRC64 algorithm"
+       tristate "CRC64 based on Rocksoft Model algorithm"
        depends on CRC64
        select CRYPTO_HASH
+       help
+         CRC64 CRC algorithm based on the Rocksoft Model CRC Algorithm
+
+         Used by the NVMe implementation of T10 DIF (BLK_DEV_INTEGRITY)
+
+         See https://zlib.net/crc_v3.txt
 
 endmenu