net: mscc: ocelot: split writes to pause frame enable bit and to thresholds
authorVladimir Oltean <vladimir.oltean@nxp.com>
Mon, 13 Jul 2020 16:57:05 +0000 (19:57 +0300)
committerDavid S. Miller <davem@davemloft.net>
Tue, 14 Jul 2020 00:40:01 +0000 (17:40 -0700)
We don't want ocelot_port_set_maxlen to enable pause frame TX, just to
adjust the pause thresholds.

Move the unconditional enabling of pause TX to ocelot_init_port. There
is no good place to put such setting because it shouldn't be
unconditional. But at the moment it is, we're not changing that.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mscc/ocelot.c

index 36986fc..aca805b 100644 (file)
@@ -1259,6 +1259,7 @@ void ocelot_port_set_maxlen(struct ocelot *ocelot, int port, size_t sdu)
 {
        struct ocelot_port *ocelot_port = ocelot->ports[port];
        int maxlen = sdu + ETH_HLEN + ETH_FCS_LEN;
+       int pause_start, pause_stop;
        int atop_wm;
 
        if (port == ocelot->npi) {
@@ -1272,13 +1273,13 @@ void ocelot_port_set_maxlen(struct ocelot *ocelot, int port, size_t sdu)
 
        ocelot_port_writel(ocelot_port, maxlen, DEV_MAC_MAXLEN_CFG);
 
-       /* Set Pause WM hysteresis
-        * 152 = 6 * maxlen / OCELOT_BUFFER_CELL_SZ
-        * 101 = 4 * maxlen / OCELOT_BUFFER_CELL_SZ
-        */
-       ocelot_write_rix(ocelot, SYS_PAUSE_CFG_PAUSE_ENA |
-                        SYS_PAUSE_CFG_PAUSE_STOP(101) |
-                        SYS_PAUSE_CFG_PAUSE_START(152), SYS_PAUSE_CFG, port);
+       /* Set Pause watermark hysteresis */
+       pause_start = 6 * maxlen / OCELOT_BUFFER_CELL_SZ;
+       pause_stop = 4 * maxlen / OCELOT_BUFFER_CELL_SZ;
+       ocelot_rmw_rix(ocelot, SYS_PAUSE_CFG_PAUSE_START(pause_start),
+                      SYS_PAUSE_CFG_PAUSE_START_M, SYS_PAUSE_CFG, port);
+       ocelot_rmw_rix(ocelot, SYS_PAUSE_CFG_PAUSE_STOP(pause_stop),
+                      SYS_PAUSE_CFG_PAUSE_STOP_M, SYS_PAUSE_CFG, port);
 
        /* Tail dropping watermark */
        atop_wm = (ocelot->shared_queue_sz - 9 * maxlen) /
@@ -1341,6 +1342,10 @@ void ocelot_init_port(struct ocelot *ocelot, int port)
        ocelot_port_writel(ocelot_port, 0, DEV_MAC_FC_MAC_HIGH_CFG);
        ocelot_port_writel(ocelot_port, 0, DEV_MAC_FC_MAC_LOW_CFG);
 
+       /* Enable transmission of pause frames */
+       ocelot_rmw_rix(ocelot, SYS_PAUSE_CFG_PAUSE_ENA, SYS_PAUSE_CFG_PAUSE_ENA,
+                      SYS_PAUSE_CFG, port);
+
        /* Drop frames with multicast source address */
        ocelot_rmw_gix(ocelot, ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA,
                       ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA,