drm/msm/dpu: tidy up some error checking

The "vsync_hz" variable is unsigned int so it can't be less
than zero.  The dpu_kms_get_clk_rate() function used to return a u64
but I previously changed it to return an unsigned long and zero on
error so it matches clk_get_rate().

Change the "vsync_hz" type to unsigned long as well and change the
error checking to check for zero instead of negatives.  This change
does not affect runtime at all.  It's just a clean up.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/541225/
Link: https://lore.kernel.org/r/ZH7vP2Swu8CYpgUL@moroto
[DB: fixed debug message]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index 107f0ef..63ba008 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
@@ -323,7 +323,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config(
        struct dpu_hw_tear_check tc_cfg = { 0 };
        struct drm_display_mode *mode;
        bool tc_enable = true;
-       u32 vsync_hz;
+       unsigned long vsync_hz;
        struct dpu_kms *dpu_kms;
 
        if (phys_enc->has_intf_te) {
@@ -358,9 +358,8 @@ static void dpu_encoder_phys_cmd_tearcheck_config(
         * frequency divided by the no. of rows (lines) in the LCDpanel.
         */
        vsync_hz = dpu_kms_get_clk_rate(dpu_kms, "vsync");
-       if (vsync_hz <= 0) {
-               DPU_DEBUG_CMDENC(cmd_enc, "invalid - vsync_hz %u\n",
-                                vsync_hz);
+       if (!vsync_hz) {
+               DPU_DEBUG_CMDENC(cmd_enc, "invalid - no vsync clock\n");
                return;
        }
 
@@ -380,7 +379,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config(
        tc_cfg.rd_ptr_irq = mode->vdisplay + 1;
 
        DPU_DEBUG_CMDENC(cmd_enc,
-               "tc vsync_clk_speed_hz %u vtotal %u vrefresh %u\n",
+               "tc vsync_clk_speed_hz %lu vtotal %u vrefresh %u\n",
                vsync_hz, mode->vtotal, drm_mode_vrefresh(mode));
        DPU_DEBUG_CMDENC(cmd_enc,
                "tc enable %u start_pos %u rd_ptr_irq %u\n",