clk: bcm2835: Fix PLL poweron
authorEric Anholt <eric@anholt.net>
Wed, 13 Apr 2016 20:05:03 +0000 (13:05 -0700)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 20 Apr 2016 01:56:17 +0000 (18:56 -0700)
In poweroff, we set the reset bit and the power down bit, but only
managed to unset the reset bit for poweron.  This meant that if HDMI
did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the
PLLH (that had been on at boot time) and never recover.

Signed-off-by: Eric Anholt <eric@anholt.net>
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
Cc: stable@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/bcm/clk-bcm2835.c

index 87616de..7a79708 100644 (file)
@@ -554,6 +554,10 @@ static int bcm2835_pll_on(struct clk_hw *hw)
        const struct bcm2835_pll_data *data = pll->data;
        ktime_t timeout;
 
+       cprman_write(cprman, data->a2w_ctrl_reg,
+                    cprman_read(cprman, data->a2w_ctrl_reg) &
+                    ~A2W_PLL_CTRL_PWRDN);
+
        /* Take the PLL out of reset. */
        cprman_write(cprman, data->cm_ctrl_reg,
                     cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);