ACPI: CPPC: fix some coding style issues

Fix some coding style issues reported by checkpatch.pl, including the
following types:

WARNING: Missing a blank line after declarations
WARNING: unnecessary whitespace before a quoted newline
ERROR: spaces required around that '>='
ERROR: switch and case should be at the same indent

Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index 12478e6..c383a51 100644 (file)
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -327,6 +327,7 @@ end:
                if (unlikely(ret)) {
                        for_each_possible_cpu(i) {
                                struct cpc_desc *desc = per_cpu(cpc_desc_ptr, i);
+
                                if (!desc)
                                        continue;
 
@@ -778,7 +779,7 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
                        cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_BUFFER;
                        memcpy(&cpc_ptr->cpc_regs[i-2].cpc_entry.reg, gas_t, sizeof(*gas_t));
                } else {
-                       pr_debug("Err in entry:%d in CPC table of CPU:%d \n", i, pr->id);
+                       pr_debug("Err in entry:%d in CPC table of CPU:%d\n", i, pr->id);
                        goto out_free;
                }
        }
@@ -868,7 +869,7 @@ void acpi_cppc_processor_exit(struct acpi_processor *pr)
        void __iomem *addr;
        int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, pr->id);
 
-       if (pcc_ss_id >=0 && pcc_data[pcc_ss_id]) {
+       if (pcc_ss_id >= 0 && pcc_data[pcc_ss_id]) {
                if (pcc_data[pcc_ss_id]->pcc_channel_acquired) {
                        pcc_data[pcc_ss_id]->refcount--;
                        if (!pcc_data[pcc_ss_id]->refcount) {
@@ -955,22 +956,22 @@ static int cpc_read(int cpu, struct cpc_register_resource *reg_res, u64 *val)
                                val, reg->bit_width);
 
        switch (reg->bit_width) {
-               case 8:
-                       *val = readb_relaxed(vaddr);
-                       break;
-               case 16:
-                       *val = readw_relaxed(vaddr);
-                       break;
-               case 32:
-                       *val = readl_relaxed(vaddr);
-                       break;
-               case 64:
-                       *val = readq_relaxed(vaddr);
-                       break;
-               default:
-                       pr_debug("Error: Cannot read %u bit width from PCC for ss: %d\n",
-                                reg->bit_width, pcc_ss_id);
-                       ret_val = -EFAULT;
+       case 8:
+               *val = readb_relaxed(vaddr);
+               break;
+       case 16:
+               *val = readw_relaxed(vaddr);
+               break;
+       case 32:
+               *val = readl_relaxed(vaddr);
+               break;
+       case 64:
+               *val = readq_relaxed(vaddr);
+               break;
+       default:
+               pr_debug("Error: Cannot read %u bit width from PCC for ss: %d\n",
+                        reg->bit_width, pcc_ss_id);
+               ret_val = -EFAULT;
        }
 
        return ret_val;
@@ -994,23 +995,23 @@ static int cpc_write(int cpu, struct cpc_register_resource *reg_res, u64 val)
                                val, reg->bit_width);
 
        switch (reg->bit_width) {
-               case 8:
-                       writeb_relaxed(val, vaddr);
-                       break;
-               case 16:
-                       writew_relaxed(val, vaddr);
-                       break;
-               case 32:
-                       writel_relaxed(val, vaddr);
-                       break;
-               case 64:
-                       writeq_relaxed(val, vaddr);
-                       break;
-               default:
-                       pr_debug("Error: Cannot write %u bit width to PCC for ss: %d\n",
-                                reg->bit_width, pcc_ss_id);
-                       ret_val = -EFAULT;
-                       break;
+       case 8:
+               writeb_relaxed(val, vaddr);
+               break;
+       case 16:
+               writew_relaxed(val, vaddr);
+               break;
+       case 32:
+               writel_relaxed(val, vaddr);
+               break;
+       case 64:
+               writeq_relaxed(val, vaddr);
+               break;
+       default:
+               pr_debug("Error: Cannot write %u bit width to PCC for ss: %d\n",
+                        reg->bit_width, pcc_ss_id);
+               ret_val = -EFAULT;
+               break;
        }
 
        return ret_val;