bpf: x86: Factor out a lookup table for some ALU opcodes

A later commit will need to lookup a subset of these opcodes. To
avoid duplicating code, pull out a table.

The shift opcodes won't be needed by that later commit, but they're
already duplicated, so fold them into the table anyway.

Signed-off-by: Brendan Jackman <jackmanb@google.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Acked-by: John Fastabend <john.fastabend@gmail.com>
Link: https://lore.kernel.org/bpf/20210114181751.768687-4-jackmanb@google.com

diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index f15c932..93f32e0 100644 (file)
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -205,6 +205,18 @@ static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
        return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
 }
 
+/* Some 1-byte opcodes for binary ALU operations */
+static u8 simple_alu_opcodes[] = {
+       [BPF_ADD] = 0x01,
+       [BPF_SUB] = 0x29,
+       [BPF_AND] = 0x21,
+       [BPF_OR] = 0x09,
+       [BPF_XOR] = 0x31,
+       [BPF_LSH] = 0xE0,
+       [BPF_RSH] = 0xE8,
+       [BPF_ARSH] = 0xF8,
+};
+
 static void jit_fill_hole(void *area, unsigned int size)
 {
        /* Fill whole space with INT3 instructions */
@@ -862,15 +874,9 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
                case BPF_ALU64 | BPF_AND | BPF_X:
                case BPF_ALU64 | BPF_OR | BPF_X:
                case BPF_ALU64 | BPF_XOR | BPF_X:
-                       switch (BPF_OP(insn->code)) {
-                       case BPF_ADD: b2 = 0x01; break;
-                       case BPF_SUB: b2 = 0x29; break;
-                       case BPF_AND: b2 = 0x21; break;
-                       case BPF_OR: b2 = 0x09; break;
-                       case BPF_XOR: b2 = 0x31; break;
-                       }
                        maybe_emit_mod(&prog, dst_reg, src_reg,
                                       BPF_CLASS(insn->code) == BPF_ALU64);
+                       b2 = simple_alu_opcodes[BPF_OP(insn->code)];
                        EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
                        break;
 
@@ -1050,12 +1056,7 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
                        else if (is_ereg(dst_reg))
                                EMIT1(add_1mod(0x40, dst_reg));
 
-                       switch (BPF_OP(insn->code)) {
-                       case BPF_LSH: b3 = 0xE0; break;
-                       case BPF_RSH: b3 = 0xE8; break;
-                       case BPF_ARSH: b3 = 0xF8; break;
-                       }
-
+                       b3 = simple_alu_opcodes[BPF_OP(insn->code)];
                        if (imm32 == 1)
                                EMIT2(0xD1, add_1reg(b3, dst_reg));
                        else
@@ -1089,11 +1090,7 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
                        else if (is_ereg(dst_reg))
                                EMIT1(add_1mod(0x40, dst_reg));
 
-                       switch (BPF_OP(insn->code)) {
-                       case BPF_LSH: b3 = 0xE0; break;
-                       case BPF_RSH: b3 = 0xE8; break;
-                       case BPF_ARSH: b3 = 0xF8; break;
-                       }
+                       b3 = simple_alu_opcodes[BPF_OP(insn->code)];
                        EMIT2(0xD3, add_1reg(b3, dst_reg));
 
                        if (src_reg != BPF_REG_4)