spi: xilinx: Add DT support for selecting transfer word width

This core supports either 8, 16 or 32 bits as word width. This value is only
settable on instantiation, and thus we need to support any of them by means
of the device tree.

Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
Link: https://lore.kernel.org/r/20191024110757.25820-3-alvaro.gamez@hazent.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
index d5f9d5f..8dd2bb9 100644 (file)
--- a/drivers/spi/spi-xilinx.c
+++ b/drivers/spi/spi-xilinx.c
@@ -391,7 +391,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
        struct xilinx_spi *xspi;
        struct xspi_platform_data *pdata;
        struct resource *res;
-       int ret, num_cs = 0, bits_per_word = 8;
+       int ret, num_cs = 0, bits_per_word;
        struct spi_master *master;
        u32 tmp;
        u8 i;
@@ -403,6 +403,11 @@ static int xilinx_spi_probe(struct platform_device *pdev)
        } else {
                of_property_read_u32(pdev->dev.of_node, "xlnx,num-ss-bits",
                                          &num_cs);
+               ret = of_property_read_u32(pdev->dev.of_node,
+                                          "xlnx,num-transfer-bits",
+                                          &bits_per_word);
+               if (ret)
+                       bits_per_word = 8;
        }
 
        if (!num_cs) {