pinctrl: intel: Use GENMASK() consistently

Use GENMASK() macro for all definitions.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index d7acbb7..6895050 100644 (file)
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -33,13 +33,13 @@
 
 #define PADOWN_BITS                    4
 #define PADOWN_SHIFT(p)                        ((p) % 8 * PADOWN_BITS)
-#define PADOWN_MASK(p)                 (0xf << PADOWN_SHIFT(p))
+#define PADOWN_MASK(p)                 (GENMASK(3, 0) << PADOWN_SHIFT(p))
 #define PADOWN_GPP(p)                  ((p) / 8)
 
 /* Offset from pad_regs */
 #define PADCFG0                                0x000
 #define PADCFG0_RXEVCFG_SHIFT          25
-#define PADCFG0_RXEVCFG_MASK           (3 << PADCFG0_RXEVCFG_SHIFT)
+#define PADCFG0_RXEVCFG_MASK           GENMASK(26, 25)
 #define PADCFG0_RXEVCFG_LEVEL          0
 #define PADCFG0_RXEVCFG_EDGE           1
 #define PADCFG0_RXEVCFG_DISABLED       2
@@ -51,7 +51,7 @@
 #define PADCFG0_GPIROUTSMI             BIT(18)
 #define PADCFG0_GPIROUTNMI             BIT(17)
 #define PADCFG0_PMODE_SHIFT            10
-#define PADCFG0_PMODE_MASK             (0xf << PADCFG0_PMODE_SHIFT)
+#define PADCFG0_PMODE_MASK             GENMASK(13, 10)
 #define PADCFG0_GPIORXDIS              BIT(9)
 #define PADCFG0_GPIOTXDIS              BIT(8)
 #define PADCFG0_GPIORXSTATE            BIT(1)
@@ -60,7 +60,7 @@
 #define PADCFG1                                0x004
 #define PADCFG1_TERM_UP                        BIT(13)
 #define PADCFG1_TERM_SHIFT             10
-#define PADCFG1_TERM_MASK              (7 << PADCFG1_TERM_SHIFT)
+#define PADCFG1_TERM_MASK              GENMASK(12, 10)
 #define PADCFG1_TERM_20K               4
 #define PADCFG1_TERM_2K                        3
 #define PADCFG1_TERM_5K                        2