x86/mce: Add macros for the corrected error count bit field
authorQiuxu Zhuo <qiuxu.zhuo@intel.com>
Tue, 25 Sep 2018 00:03:43 +0000 (17:03 -0700)
committerBorislav Petkov <bp@suse.de>
Thu, 27 Sep 2018 14:08:18 +0000 (16:08 +0200)
The bit field [52:38] of MCi_STATUS contains the corrected error count.
Add {*_SHIFT|*_MASK|*_CEC(c)} macros for it.

 [ bp: use GENMASK_ULL. ]

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Aristeu Rozanski <aris@redhat.com>
Cc: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Cc: linux-edac@vger.kernel.org
Cc: x86@kernel.org
Link: https://lkml.kernel.org/r/20180925000343.GB5998@agluck-desk
arch/x86/include/asm/mce.h

index 6f95047..97d6969 100644 (file)
@@ -39,6 +39,9 @@
 #define MCI_STATUS_PCC         BIT_ULL(57)  /* processor context corrupt */
 #define MCI_STATUS_S           BIT_ULL(56)  /* Signaled machine check */
 #define MCI_STATUS_AR          BIT_ULL(55)  /* Action required */
+#define MCI_STATUS_CEC_SHIFT   38           /* Corrected Error Count */
+#define MCI_STATUS_CEC_MASK    GENMASK_ULL(52,38)
+#define MCI_STATUS_CEC(c)      (((c) & MCI_STATUS_CEC_MASK) >> MCI_STATUS_CEC_SHIFT)
 
 /* AMD-specific bits */
 #define MCI_STATUS_TCC         BIT_ULL(55)  /* Task context corrupt */