*/
__u32 name;
/**
- * @flags: MBZ
+ * @pad: MBZ
*
* All undefined bits must be zero.
*/
*/
__u32 handle;
+ /** @pad: MBZ */
+ __u32 pad;
+
/** @reserved: Reserved */
__u64 reserved[2];
};
#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
__u32 property;
+ /** @pad: MBZ */
+ __u32 pad;
+
/** @value: property value */
__u64 value;
*/
__u32 obj;
+ /** @pad: MBZ */
+ __u32 pad;
+
union {
/**
* @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
/** @num_binds: number of binds in this IOCTL */
__u32 num_binds;
+ /** @pad: MBZ */
+ __u32 pad;
+
union {
/** @bind: used if num_binds == 1 */
struct drm_xe_vm_bind_op bind;
/** @num_syncs: amount of syncs to wait on */
__u32 num_syncs;
+ /** @pad2: MBZ */
+ __u32 pad2;
+
/** @syncs: pointer to struct drm_xe_sync array */
__u64 syncs;
/** @property: property to set */
__u32 property;
+ /** @pad: MBZ */
+ __u32 pad;
+
/** @value: property value */
__u64 value;
};
#define DRM_XE_SYNC_USER_FENCE 0x3
#define DRM_XE_SYNC_SIGNAL 0x10
+ /** @pad: MBZ */
+ __u32 pad;
+
union {
__u32 handle;
/**
*/
__u16 num_batch_buffer;
+ /** @pad: MBZ */
+ __u16 pad[3];
+
/** @reserved: Reserved */
__u64 reserved[2];
};
#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
__u16 flags;
+ /** @pad: MBZ */
+ __u32 pad;
/** @value: compare value */
__u64 value;
/** @mask: comparison mask */
/** @vm_id: The ID VM in which the VMA exists */
__u32 vm_id;
+ /** @pad: MBZ */
+ __u32 pad;
+
/** @range: Number of bytes in the VMA */
__u64 range;
/** @property: property to set */
__u32 property;
+ /** @pad2: MBZ */
+ __u32 pad2;
+
/** @value: property value */
__u64 value;