dt-bindings: clock: exynosautov920: add cpucl0 clock definitions
authorShin Son <shin.son@samsung.com>
Wed, 23 Apr 2025 04:41:51 +0000 (13:41 +0900)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sun, 27 Apr 2025 19:21:40 +0000 (21:21 +0200)
Add cpucl0 clock definitions.

CPUCL0 refers to CPU Cluster 0, which provide clock support
for the CPUs on Exynosauto V920 SoC.

Signed-off-by: Shin Son <shin.son@samsung.com>
Link: https://lore.kernel.org/r/20250423044153.1288077-2-shin.son@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml
include/dt-bindings/clock/samsung,exynosautov920.h

index 3330b27..d12b17c 100644 (file)
@@ -8,6 +8,7 @@ title: Samsung ExynosAuto v920 SoC clock controller
 
 maintainers:
   - Sunyeal Hong <sunyeal.hong@samsung.com>
+  - Shin Son <shin.son@samsung.com>
   - Chanwoo Choi <cw00.choi@samsung.com>
   - Krzysztof Kozlowski <krzk@kernel.org>
   - Sylwester Nawrocki <s.nawrocki@samsung.com>
@@ -32,6 +33,7 @@ properties:
   compatible:
     enum:
       - samsung,exynosautov920-cmu-top
+      - samsung,exynosautov920-cmu-cpucl0
       - samsung,exynosautov920-cmu-peric0
       - samsung,exynosautov920-cmu-peric1
       - samsung,exynosautov920-cmu-misc
@@ -69,6 +71,29 @@ allOf:
           items:
             - const: oscclk
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - samsung,exynosautov920-cmu-cpucl0
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (38.4 MHz)
+            - description: CMU_CPUCL0 SWITCH clock (from CMU_TOP)
+            - description: CMU_CPUCL0 CLUSTER clock (from CMU_TOP)
+            - description: CMU_CPUCL0 DBG clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: switch
+            - const: cluster
+            - const: dbg
+
   - if:
       properties:
         compatible:
index 0c681f2..c57a1d7 100644 (file)
 #define DOUT_CLKCMU_TAA_NOC            146
 #define DOUT_TCXO_DIV2                 147
 
+/* CMU_CPUCL0 */
+#define CLK_FOUT_CPUCL0_PLL            1
+
+#define CLK_MOUT_PLL_CPUCL0            2
+#define CLK_MOUT_CPUCL0_CLUSTER_USER   3
+#define CLK_MOUT_CPUCL0_DBG_USER       4
+#define CLK_MOUT_CPUCL0_SWITCH_USER    5
+#define CLK_MOUT_CPUCL0_CLUSTER                6
+#define CLK_MOUT_CPUCL0_CORE           7
+
+#define CLK_DOUT_CLUSTER0_ACLK         8
+#define CLK_DOUT_CLUSTER0_ATCLK                9
+#define CLK_DOUT_CLUSTER0_MPCLK                10
+#define CLK_DOUT_CLUSTER0_PCLK         11
+#define CLK_DOUT_CLUSTER0_PERIPHCLK    12
+#define CLK_DOUT_CPUCL0_DBG_NOC                13
+#define CLK_DOUT_CPUCL0_DBG_PCLKDBG    14
+#define CLK_DOUT_CPUCL0_NOCP           15
+
 /* CMU_PERIC0 */
 #define CLK_MOUT_PERIC0_IP_USER                1
 #define CLK_MOUT_PERIC0_NOC_USER       2