drm/tegra: falcon: Set DMACTX field on DMA transactions

The DMACTX field determines which context, as specified in the
TRANSCFG register, is used. While during boot it doesn't matter
which is used, later on it matters and this value is reused by
the firmware.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/gpu/drm/tegra/falcon.c b/drivers/gpu/drm/tegra/falcon.c
index 3762d87..c0d8546 100644 (file)
--- a/drivers/gpu/drm/tegra/falcon.c
+++ b/drivers/gpu/drm/tegra/falcon.c
@@ -48,6 +48,14 @@ static int falcon_copy_chunk(struct falcon *falcon,
        if (target == FALCON_MEMORY_IMEM)
                cmd |= FALCON_DMATRFCMD_IMEM;
 
+       /*
+        * Use second DMA context (i.e. the one for firmware). Strictly
+        * speaking, at this point both DMA contexts point to the firmware
+        * stream ID, but this register's value will be reused by the firmware
+        * for later DMA transactions, so we need to use the correct value.
+        */
+       cmd |= FALCON_DMATRFCMD_DMACTX(1);
+
        falcon_writel(falcon, offset, FALCON_DMATRFMOFFS);
        falcon_writel(falcon, base, FALCON_DMATRFFBOFFS);
        falcon_writel(falcon, cmd, FALCON_DMATRFCMD);

diff --git a/drivers/gpu/drm/tegra/falcon.h b/drivers/gpu/drm/tegra/falcon.h
index c56ee32..1955cf1 100644 (file)
--- a/drivers/gpu/drm/tegra/falcon.h
+++ b/drivers/gpu/drm/tegra/falcon.h
@@ -50,6 +50,7 @@
 #define FALCON_DMATRFCMD_IDLE                  (1 << 1)
 #define FALCON_DMATRFCMD_IMEM                  (1 << 4)
 #define FALCON_DMATRFCMD_SIZE_256B             (6 << 8)
+#define FALCON_DMATRFCMD_DMACTX(v)             (((v) & 0x7) << 12)
 
 #define FALCON_DMATRFFBOFFS                    0x0000111c