arm64: zynqmp: Add dmas, dp, rtc, watchdogs and opp nodes for SOM
authorMichal Simek <michal.simek@amd.com>
Tue, 2 May 2023 13:35:37 +0000 (15:35 +0200)
committerMichal Simek <michal.simek@amd.com>
Tue, 16 May 2023 12:50:14 +0000 (14:50 +0200)
There are couple of IPs which are enabled in origin HW design which are
missing in SOM dt. Add them to match default setup.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5d3777fdf91d114effe1921255a7ad71ef30d277.1683034376.git.michal.simek@amd.com
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts

index 3441230..54cf2e8 100644 (file)
                          "", "", "", ""; /* 170 - 173 */
 };
 
+&zynqmp_dpsub {
+       status = "okay";
+};
+
+&rtc {
+       status = "okay";
+};
+
+&lpd_dma_chan1 {
+       status = "okay";
+};
+
+&lpd_dma_chan2 {
+       status = "okay";
+};
+
+&lpd_dma_chan3 {
+       status = "okay";
+};
+
+&lpd_dma_chan4 {
+       status = "okay";
+};
+
+&lpd_dma_chan5 {
+       status = "okay";
+};
+
+&lpd_dma_chan6 {
+       status = "okay";
+};
+
+&lpd_dma_chan7 {
+       status = "okay";
+};
+
+&lpd_dma_chan8 {
+       status = "okay";
+};
+
+&fpd_dma_chan1 {
+       status = "okay";
+};
+
+&fpd_dma_chan2 {
+       status = "okay";
+};
+
+&fpd_dma_chan3 {
+       status = "okay";
+};
+
+&fpd_dma_chan4 {
+       status = "okay";
+};
+
+&fpd_dma_chan5 {
+       status = "okay";
+};
+
+&fpd_dma_chan6 {
+       status = "okay";
+};
+
+&fpd_dma_chan7 {
+       status = "okay";
+};
+
+&fpd_dma_chan8 {
+       status = "okay";
+};
+
 &gpu {
        status = "okay";
 };
+
+&lpd_watchdog {
+       status = "okay";
+};
+
+&watchdog0 {
+       status = "okay";
+};
+
+&cpu_opp_table {
+       opp00 {
+               opp-hz = /bits/ 64 <1333333333>;
+       };
+       opp01 {
+               opp-hz = /bits/ 64 <666666666>;
+       };
+       opp02 {
+               opp-hz = /bits/ 64 <444444444>;
+       };
+       opp03 {
+               opp-hz = /bits/ 64 <333333333>;
+       };
+};