rtw88: 8822c: disable rx clock gating before counter reset
authorYan-Hsuan Chuang <yhchuang@realtek.com>
Fri, 14 Jun 2019 07:24:10 +0000 (15:24 +0800)
committerKalle Valo <kvalo@codeaurora.org>
Tue, 25 Jun 2019 05:08:57 +0000 (08:08 +0300)
Driver Could fail to reset counter if rx clock gating is not disabled.
So we need to disable rx clock gating before resetting counters.
Otherwise counters may increase unexpected.

Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/realtek/rtw88/rtw8822c.c
drivers/net/wireless/realtek/rtw88/rtw8822c.h

index be46a1b..22380b1 100644 (file)
@@ -1508,8 +1508,12 @@ static void rtw8822c_false_alarm_statistics(struct rtw_dev *rtwdev)
        rtw_write32_mask(rtwdev, REG_CCANRX, BIT_CCK_FA_RST, 2);
        rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 0);
        rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 2);
+
+       /* disable rx clk gating to reset counters */
+       rtw_write32_clr(rtwdev, REG_RX_BREAK, BIT_COM_RX_GCK_EN);
        rtw_write32_set(rtwdev, REG_CNT_CTRL, BIT_ALL_CNT_RST);
        rtw_write32_clr(rtwdev, REG_CNT_CTRL, BIT_ALL_CNT_RST);
+       rtw_write32_set(rtwdev, REG_RX_BREAK, BIT_COM_RX_GCK_EN);
 }
 
 static void rtw8822c_do_iqk(struct rtw_dev *rtwdev)
index ef708ba..33125e7 100644 (file)
@@ -177,6 +177,8 @@ struct rtw8822c_efuse {
 #define BIT_CCK_BLK_EN         BIT(1)
 #define BIT_CCK_OFDM_BLK_EN    (BIT(0) | BIT(1))
 #define REG_CCAMSK     0x1c80
+#define REG_RX_BREAK   0x1d2c
+#define BIT_COM_RX_GCK_EN      BIT(31)
 #define REG_RXFNCTL    0x1d30
 #define REG_RXIGI      0x1d70
 #define REG_ENFN       0x1e24