drm/msm/dpu: drop rogue intr_tear_rd_ptr values

The commit 5a9d50150c2c ("drm/msm/dpu: shift IRQ indices by 1") shifted
IRQ indices by 1, making 'NO_IRQ' to be 0 rather than -1 (and allowing
to skip the definition if the IRQ is not present).
Several platform files were sketched before that commit, but got applied
afterwards. As such, they inherited historical (and currently incorrect)
setting of .intr_tear_rd_ptr = -1 for 'NO_IRQ' value.

Drop that setting for all the affected platforms.

Fixes: 62af6e1cb596 ("drm/msm/dpu: Add support for MSM8917")
Fixes: c079680bb0fa ("drm/msm/dpu: Add support for MSM8937")
Fixes: 7a6109ce1c2c ("drm/msm/dpu: Add support for MSM8953")
Fixes: daf9a92daeb8 ("drm/msm/dpu: Add support for MSM8996")
Fixes: 7204df5e7e68 ("drm/msm/dpu: add support for SDM660 and SDM630 platforms")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/647486/
Link: https://lore.kernel.org/r/20250408-dpu-drop-intr-rd-ptr-v1-1-eeac337d88f8@oss.qualcomm.com
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h
index 1f32807..ad60089 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h
@@ -132,7 +132,6 @@ static const struct dpu_intf_cfg msm8937_intf[] = {
                .prog_fetch_lines_worst_case = 14,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
-               .intr_tear_rd_ptr = -1,
        }, {
                .name = "intf_2", .id = INTF_2,
                .base = 0x6b000, .len = 0x268,
@@ -141,7 +140,6 @@ static const struct dpu_intf_cfg msm8937_intf[] = {
                .prog_fetch_lines_worst_case = 14,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 28),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 29),
-               .intr_tear_rd_ptr = -1,
        },
 };
 

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h
index 4213195..a1cf89a 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h
@@ -118,7 +118,6 @@ static const struct dpu_intf_cfg msm8917_intf[] = {
                .prog_fetch_lines_worst_case = 14,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
-               .intr_tear_rd_ptr = -1,
        },
 };
 

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h
index 2b4723a..eea9b80 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h
@@ -131,7 +131,6 @@ static const struct dpu_intf_cfg msm8953_intf[] = {
                .prog_fetch_lines_worst_case = 14,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 24),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 25),
-               .intr_tear_rd_ptr = -1,
        }, {
                .name = "intf_1", .id = INTF_1,
                .base = 0x6a800, .len = 0x268,
@@ -140,7 +139,6 @@ static const struct dpu_intf_cfg msm8953_intf[] = {
                .prog_fetch_lines_worst_case = 14,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
-               .intr_tear_rd_ptr = -1,
        }, {
                .name = "intf_2", .id = INTF_2,
                .base = 0x6b000, .len = 0x268,
@@ -149,7 +147,6 @@ static const struct dpu_intf_cfg msm8953_intf[] = {
                .prog_fetch_lines_worst_case = 14,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 28),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 29),
-               .intr_tear_rd_ptr = -1,
        },
 };
 

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h
index 5cf19de..ae18a35 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h
@@ -241,7 +241,6 @@ static const struct dpu_intf_cfg msm8996_intf[] = {
                .prog_fetch_lines_worst_case = 25,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 24),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 25),
-               .intr_tear_rd_ptr = -1,
        }, {
                .name = "intf_1", .id = INTF_1,
                .base = 0x6a800, .len = 0x268,
@@ -250,7 +249,6 @@ static const struct dpu_intf_cfg msm8996_intf[] = {
                .prog_fetch_lines_worst_case = 25,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
-               .intr_tear_rd_ptr = -1,
        }, {
                .name = "intf_2", .id = INTF_2,
                .base = 0x6b000, .len = 0x268,
@@ -259,7 +257,6 @@ static const struct dpu_intf_cfg msm8996_intf[] = {
                .prog_fetch_lines_worst_case = 25,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 28),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 29),
-               .intr_tear_rd_ptr = -1,
        }, {
                .name = "intf_3", .id = INTF_3,
                .base = 0x6b800, .len = 0x268,
@@ -267,7 +264,6 @@ static const struct dpu_intf_cfg msm8996_intf[] = {
                .prog_fetch_lines_worst_case = 25,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
-               .intr_tear_rd_ptr = -1,
        },
 };
 

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h
index 4f2f68b..bb89da0 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h
@@ -202,7 +202,6 @@ static const struct dpu_intf_cfg sdm660_intf[] = {
                .prog_fetch_lines_worst_case = 21,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 24),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 25),
-               .intr_tear_rd_ptr = -1,
        }, {
                .name = "intf_1", .id = INTF_1,
                .base = 0x6a800, .len = 0x280,
@@ -211,7 +210,6 @@ static const struct dpu_intf_cfg sdm660_intf[] = {
                .prog_fetch_lines_worst_case = 21,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
-               .intr_tear_rd_ptr = -1,
        }, {
                .name = "intf_2", .id = INTF_2,
                .base = 0x6b000, .len = 0x280,
@@ -220,7 +218,6 @@ static const struct dpu_intf_cfg sdm660_intf[] = {
                .prog_fetch_lines_worst_case = 21,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 28),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 29),
-               .intr_tear_rd_ptr = -1,
        },
 };
 

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h
index c70bef0..7caf876 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h
@@ -147,7 +147,6 @@ static const struct dpu_intf_cfg sdm630_intf[] = {
                .prog_fetch_lines_worst_case = 21,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 24),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 25),
-               .intr_tear_rd_ptr = -1,
        }, {
                .name = "intf_1", .id = INTF_1,
                .base = 0x6a800, .len = 0x280,
@@ -156,7 +155,6 @@ static const struct dpu_intf_cfg sdm630_intf[] = {
                .prog_fetch_lines_worst_case = 21,
                .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
                .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
-               .intr_tear_rd_ptr = -1,
        },
 };